Wheel detector amplifier

Claim 2

An improved amplifier responsive to a wheel detector generating signals indicating wheel presence wherein the improvement for discriminating true wheel detector signals from noise comprises: a timing circuit for producing signals relative to the duration of wheel detector signals; and an output stage coupled to the timing circuit for generating an output signal whenever the timing circuit delivers its signal with a value greater than a minimum duration comparable to anticipated wheel detector signals including: a buffer responsive to the signals of the timing stage; and a primary amplifier responsive to the signal of greater than a minimum amplitude for generating the output signal; the buffer coupled between the primary amplifier and the timing circuit being effective to isolate the timing circuit from the primary amplifier and matching impedance levels of the timing circuit and the primary amplifier.

Claim 3

The improved amplifier of claim 1 wherein the timing circuit includes: impedance means including, resistive and capacitive energy storage elements charged by the wheel detector signals for producing the timing circuit signals; the impedance means having a predetermined charging time; and wherein the amplitude of the timing circuit signal is directly dependent upon the duration of the wheel detector signals, and the wheel detector signal must have greater than a predetermined amplitude an duration in order for the timing circuit to attain the threshold.

Claim 4

The improved amplifier of claim 2 wherein the impedance means producing the timing circuit signals has a predetermined discharging time, the duration of the output signal is directly dependent on said discharge time, and the impedance means defines said charging and discharging time.

Claim 5

The improved amplifier of claim 3 wherein the energy storage elements have a bias potential applied thereto and further comprise a first resistor, a capacitor serially connected to said resistor, said first resistor an capacitor defining the charging time; and a second resistor connected in parallel across said first resistor and capacitor for defining the discharge time; and a diode connected in parallel across said first resistor an capacitor in a forward bias direction relative to charge stored on said capacitor and reverse bias relative to the imposed bias potential for providing said energy storage elements with a low impedance discharge path in the forward bias direction of said diode in accordance with one polarity of said capacitor.

Claim 6

The improved amplifier of claim 1 wherein the buffer comprises: a secondary amplifier connected to the timing circuit and responsive thereto; the secondary amplifier coupling the signals from the timing circuit to the output amplifier; and the secondary amplifier having low gain and high input impedance for isolating the timing circuit from the output stage.

Claim 7

The improved amplifier of claim 5 wherein the primary amplifier comprises: an output amplifier connected to the buffer and responsive to the timing circuit signals for amplifying said signals; biasing means establishing the input response of the output amplifier between a cutoff and a conductance state, said output amplifier gating the signal produced by the timing circuit in accordance with said conductance states; and the output amplifier operated to a conducting state when the timing circuit signal exceeds the predetermined minimum threshold.

Claim 8

The improved wheel detector amplifier of claim 6 wherein the output amplifier includes: energy storage means coupling the input and output of the output amplifier, providing additional discrimination for preventing signals below the minimum time duration from being transmitTed as output signals indicative of wheel presence.

Claim 9

An improved amplifier responsive to wheel detector signals wherein the improvement for discriminating true wheel detector signals from noise comprises: a. a timing circuit for producing signals relative to the duration of input signals including; two resistors; a capacitor serially connected between each of the resistors, the resistors connected at their other terminals to each other and a first reference potential; the two resistors and the capacitor form a network having a predetermined charging and discharging time; a first diode having its cathode connected to one plate of the capacitor and its anode connected to the junction formed by the two resistors, said junction being biased at a first reference potential, whereby said first diode is reverse biased relative to the first reference potential and forward biased relative to a charge stored on said capacitor; a Zener diode having its anode connected to the other plate of the capacitor and its cathode connected to a common potential, said Zener diode for limiting the bias of said anode connection to the breakdown voltage of said Zener diode; and b. an output stage, having a threshold value relative to a minimum input signal duration, coupled to the timing circuit, the output stage generating an output signal whenever the timing circuit signal has a value greater than the threshold value, including: a buffer responsive to the signals of the timing stage comprising a first transistor of one junction type, an emitter-resistor connected between the common potential and the emitter of the first transistor, a second diode having its cathode connected to the emitter of said first transistor in a manner forward biased relative to the emitter base junction, the base of the first transistor connected to the cathode of the first diode of the timer, and the collector of the first transistor connected to the anode of the first diode of the timer; and an output amplifier responsive to the signal of greater than minimum threshold for generating the output signal comprising a second transistor of opposite junction type to the first transistor, a plurality of diodes serially connected anode to cathode to the emitter the second transistor in a manner forward biased relative to the base emitter junction of said transistor for biasing the transistor, said serially coupled diodes connected to the anode of the first diode, a coupling capacitor connected across the emitter base junction of the second transistor, a resistor connected between the base of the second transistor and the common potential, the second diode connected at its anode to the base of the second transistor, said second diode being forward biased and coupling the emitter of the first transistor to the base of the second transistor, for holding the second transistor in a nonconductance state, and reversed biased when the timing circuit signal reaches the predetermined threshold for permitting the second transistor to conduct, a biasing resistor connected between the emitter of the second transistor and the common potential, an output relay coupled to the collector of the second transistor and the common potential energized in accordance with the conductance state of said second transistor, generating the output signal when energized for indicating said true wheel detector signal, and a third diode coupled across said output relay connected at its anode to the collector of transistor and at its cathode to the common potential, for preventing feedback from relay when said transistor is switched to a nonconductance state.

Claim 10

An improved amplifier responsive to wheel detector signals wherein the improvement for discriminating true wheel detector signals from noise comprises: a. a timing circuit for producing signals relative to the duration of input signals including; two resistors; a capacitor serially connected between each of the resistors, the resistors connected at their other terminals to each other and a first reference potential; the two resistors and the capacitor form a network having a predetermined charging and discharging time; a first diode having its cathode connected to one plate of the capacitor and its anode connected to the junction formed by the two resistors, said junction being biased at a first reference potential, whereby said first diode is reverse biased relative to the first reference potential and forward biased relative to a charge stored on said capacitor; a Zener diode having its anode connected to the other plate of the capacitor and its cathode connected to a common potential, said Zener diode for limiting the bias of said anode connection to the breakdown voltage of said Zener diode; and b. an output stage, having a threshold value relative to a minimum input signal duration, coupled to the timing circuit, the output stage generating an output signal whenever the timing circuit signal has a value greater than the threshold value, including: a buffer responsive to the signals of the timing stage comprising a first transistor of one junction type, an emitter-resistor connected between the common potential and the emitter of the first transistor, a second diode having its cathode connected to the emitter of said first transistor in a manner forward biased relative to the emitter base junction, the base of the first transistor connected to the cathode of the first diode of the timer, and the collector of the first transistor connected to the anode of the first diode of the timer; and an output amplifier responsive to the signal of greater than minimum threshold for generating the output signal comprising a second transistor of opposite junction type to the first transistor, a plurality of diodes serially connected anode to cathode to the emitter the second transistor in a manner forward biased relative to the base emitter junction of said transistor for biasing the transistor, said serially coupled diodes connected to the anode of the first diode, a coupling capacitor connected across the emitter base junction of the second transistor, a resistor connected between the base of the second transistor and the common potential, the second diode connected at its anode to the base of the second transistor, said second diode being forward biased and coupling the emitter of the first transistor to the base of the second transistor, for holding the second transistor in a nonconductance state, and reversed biased when the timing circuit signal reaches the predetermined threshold for permitting the second transistor to conduct, a biasing resistor connected between the emitter of the second transistor and the common potential, an output relay coupled to the collector of the second transistor and the common potential energized in accordance with the conductance state of said second transistor, generating the output signal when energized for indicating said true wheel detector signal, and a third diode coupled across said output relay connected at its anode to the collector of transistor and at its cathode to the common potential, for preventing feedback from relay when said transistor is switched to a nonconductance state.