Timing circuit

Claim 1

A TIMING CIRCUIT, INCLUDING, A CAPACITIVE CIRCUIT ARRANGEMENT INCLUDING A CAPACITANCE FOR PROVIDING PROGRESSIVELY INCREASING VOLTAGES ACROSS THE CAPACITANCE IN ACCORDANCE WITH INCREASES IN THE CHARGE IN THE CAPACITANCE, TRANSISTOR MEANS COUPLED TO AND CONTROLLED BY SAID CAPACITIVE CIRCUIT ARRANGEMENT AND HAVING HIGH AND LOW IMPEDANCE CONDITIONS AND PROVIDED WITH CHARACTERISTICS TO BECOME CONVERTED FROM SAID CONDITION OF HIGH IMPEDANCE TO SAID CONDITION OF LOW IMPEDANCE UPON THE PRODUCTION OF A FIRST PARTICULAR VOLTAGE ACROSS SAID CAPACITANCE IN SAID CAPACITIVE CIRCUIT ARRANGEMENT, A SOURCE OF POTENTIAL CONNECTED TO SAID CAPACITIVE CIRCUIT ARRANGEMENT AND TO SAID TRANSISTOR MEANS TO OBTAIN A FLOW OF A CHARGING CURRENT IN SAID CAPACITIVE CIRCUIT ARRANGEMENT, A TWO-TERMINAL BISTABLE DEVICE CONNECTED TO SAID TRANSISTOR MEANS AND HAVING FIRST AND SECOND STATES OF OPERATION RESPECTIVELY PROVIDING HIGH AND LOW IMPEDANCES AND OPERABLE IN THE SECOND STATE UPON THE INTRODUCTION ACROSS THE BISTABLE DEVICE OF A SECOND PARTICULAR VOLTAGE GREATER THAN THE POTENTIAL FROM THE SOURCE AND OPERABLE IN THE FIRST STATE UPON THE INTRODUCTION ACROSS THE BISTABLE DEVICE OF VOLTAGES LESS THAN THE SECOND PARTICULAR VOLTAGE, SWITCHING MEANS ACTUATABLE TO CONNECT SAID SOURCE TO SAID CAPACITIVE CIRCUIT ARRANGEMENT AND TO SAID TRANSISTOR MEANS AND TO SAID BISTABLE DEVICE, AND A RELAY HAVING A WINDING COUPLED TO SAID TRANSISTOR MEANS FOR DEVELOPING AN ELECTROMOTIVE FORCE UPON THE OPERATION OF SAID TRANSISTOR MEANS IN THE LOW IMPEDANCE CONDITION TO OBTAIN THE INTRODUCTION ACROSS THE BISTABLE DEVICE OF THE SECOND PARTICULAR VOLTAGE, THE RELAY BEING COUPLED TO SAID BISTABLE DEVICE AND BEING PROVIDED WITH CHARACTERISTICS TO BECOME OPERATIVE BY THE POTENTIAL FROM THE SOURCE UPON THE PRODUCTION OF A LOW IMPEDANCE IN THE BISTABLE DEVICE.