Voltage distribution system for integrated circuits utilizing low resistivity semiconductive paths for the transmission of voltages

Claim 2

The system according to claim 2 wherein said first, second and third regions, said channel portion within said second region and said second channel portion all having a relatively low resistivity to thereby maintain power losses in said system at a minimum, the electrical potential on said first region is electrically conducted to the surface of the multilayer chip via said channel portion within said second region and via said third region, and the electrical potential on said second region is electrically conducted to the surface of the multilayer chip via said second channel portion within said third region whereby two different potentials are made available at the surface of the multilayer chip by reverse biasing the regions of one conductivity type semiconductor material with respect to the regions of opposite conductivity type semiconductor material and without the requirement for insulation between the various regions of semiconductor material which are used to distribute electrical potentials and without the requirement for complex metallization patterns on the surface of the multilayer chip.

Claim 3

The system according to claim 3 wherein: a. said third region includes at least one transistor therein having an emitter, a base and a collector, said collector being integrally formed with said channel portion within said second region and biased by the electrical potential on said last named channel portion, and b. conductive means interconnecting said second channel portion with one of said base or emitter of said transistor for providing an electrical potential therefor.

Claim 4

The system according to claim 2 wherein said first and second regions are substantially coExtensive with the physical extend of the multilayer chip such that said reversed biased junction between said first and second regions provides a capacitance throughout the chip physical extent.

Claim 5

An integrated circuit structure with integral supply voltage distribution having first, second, and third layers of semiconductive material with the second layer being between and having a conductivity type material opposite to the conductivity type material in the first and third layers with a rectifying junction between adjacent layers, and a major surface of said third layer, the improvement including in combination: a. a first semiconductor channel portion extending from the first to the third layer, past the second layer, and having the same conductivity type material as the first and third layers, and a substantially smaller cross-sectional area, b. a second, opposite conductivity type channel portion extending from the second layer through the third layer and having the opposite conductivity type material, c. a semiconductor device extending into the third layer from the major surface, and having an electrical connection on said surface, d. means electrically connecting and said first and second layers to said device in supply voltage relation and at least one of such connections including one of said channel portions, and e. electrode means connected to said first and second layers for applying thereto a voltage for reverse biasing the PN junction between said first and second layers and between said first and second channel portions, whereby said first layer, said first channel portion and said third layer are included in one DC voltage transmission path between a DC supply voltage and the surface of said third layer, and said second layer and said second channel portion are included in a second DC voltage transmission path between a DC supply voltage and the surface of said third layer whereby semiconductor active and passive devices or integrated circuits fabricated in said third layer may be powered by said DC voltage which is transmitted through said structure.

Claim 6

A voltage distribution system including conductive paths within a multilayer semiconductor structure, the conductive paths consisting of portions of said multilayer semiconductor structure which are biased in such a manner that no undesirable electrical interference occurs between adjacent layers of the multilayer structure which are used to distribute voltages, said system comprising: a. a DC voltage supply having first and second terminals, b. a first region within said semiconductor structure of one conductivity type semiconductor material and having a first electrode connected to said first terminal of said DC voltage supply, c. a second region within said semiconductor structure of opposite conductivity type semiconductor material and adjacent to said first region, said second region having a second electrode thereof connected to said second terminal of said DC voltage supply, said second region having a channel portion therein of said one conductivity type semiconductor material, said channel portion formed integral with said first region and reverse biased with respect to said second region so that the electrical potential on said second region does not adversely interact with the electrical potential on said channel portion or the electrical potential on said first region, and d. a third region of said one conductivity type semiconductor material adjacent said second region and formed integral with said channel portion within said second region, said third region reverse biased with respect to said second region so that the electrical potential on said second region does not adversely interact with the electrical potential on said third region, said first and third regions and said channel portion all being of said one conductivity type semiconductor material and providing a continuous path for voltage distribution from said first region to the surface of said third region, thereby providing an electrical potential at the surface of said third region for powering integrated circuits or other semiconductor devices fabricated within the surface portions of said third region.