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US3576983A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital calculator system for computing square roots

Assignee: HP Inc
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Filing: 1968-10-02
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Granted: 1971-05-04
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Expires: 1988-10-02
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Abstract

Abstract In a data processing system, a control unit is provided for controlling the functions and operational sequence of a memory unit and an arithmetic unit so as to derive the square root of any given number. The control system includes two iterative control loops, the first of which initially subtracts a predetermined subtrahend term from one-half of the given number. Thereafter this control loop successively subtracts an incrementally advanced subtrahend term from the difference formed by the immediately preceding subtraction operation. The second iterative control loop reduces the degree of significance of the subtrahend digits when the difference formed by a subtraction operation is negative. The number of positive differences formed by the first control loop are counted and these counts represent the square root of the given number.

Inventors

  • 👤 David S Cochran

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 20:04
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/544; G06F7/552; G06F7/5525

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 369 words
In a data processing system including control, memory and arithmetic units, means for transferring data signals between said memory and arithmetic units, and means for transferring control signals among said control, memory and arithmetic units, a system for extracting the square root of a given positive number comprising: first means for storing a first number initially equal to onehalf of said given number; second means for storing a second number the least significant digit of which is the digit five; first iterative means including: means coupled to said first and second storing means for forming successive differences of said first and second numbers; means for indicating whether each said difference formed is positive or negative; means coupled to said indicating means and operable when a positive difference is indicated for incrementally increasing said second number to the next consecutive digit, starting from zero, in the digit position of said second number which is next more significant than said least significant digit; means coupled to said indicating means for counting the number of positive differences formed; second iterative means including: means responsive to the first negative difference following a succession of positive differences for storing the count of said counting means as a root digit and for resetting said counting means to zero; means responsive to the first negative difference following a succession of positive differences for restoring the positive difference immediately preceding said first negative difference; means coupled to said second means for storing said second number and operable after said positive difference is restored for decreasing all digits of the last value of said incrementally increased second number by 1* of significance; means coupled to said second means for storing said second number and operable after the digits of said second number are decreased by 1* of significance for decreasing said least significant digit five of said second number by one additional degree of significance; and means coupled to said difference forming means and operable after said last named decreasing means for returning operation to said first iterative means; whereby the square root of said given number is represented from the most significant to the least significant digit by the succession of counts stored by said counter means.
Claim 2
Dependent Claim 369 words
In a data processing system including control, memory and arithmetic units, means for transferring data signals between said memory and arithmetic units, and means for transferring control signals among said control, memory and arithmetic units, a system for extracting the square root of a given positive number comprising: first means for storing a first number initially equal to onehalf of said given number; second means for storing a second number the least significant digit of which is the digit five; first iterative means including: means coupled to said first and second storing means for forming successive differences of said first and second numbers; means for indicating whether each said difference formed is positive or negative; means coupled to said indicating means and operable when a positive difference is indicated for incrementally increasing said second number to the next consecutive digit, starting from zero, in the digit position of said second number which is next more significant than said least significant digit; means coupled to said indicating means for counting the number of positive differences formed; second iterative means including: means responsive to the first negative difference following a succession of positive differences for storing the count of said counting means as a root digit and for resetting said counting means to zero; means responsive to the first negative difference following a succession of positive differences for restoring the positive difference immediately preceding said first negative difference; means coupled to said second means for storing said second number and operable after said positive difference is restored for decreasing all digits of the last value of said incrementally increased second number by 1* of significance; means coupled to said second means for storing said second number and operable after the digits of said second number are decreased by 1* of significance for decreasing said least significant digit five of said second number by one additional degree of significance; and means coupled to said difference forming means and operable after said last named decreasing means for returning operation to said first iterative means; whereby the square root of said given number is represented from the most significant to the least significant digit by the succession of counts stored by said counter means.
Claim 3
Dependent Claim 29 words
The system of claim 1, further including means responsive to a predetermined number of counts in said storing means for stopping operation of said first and Second iterative means.
Claim 4
Dependent Claim 35 words
The system of claim 1, said positive difference restoring means including means for controlling said difference forming means to add said first negative difference to the last formed one of said incrementally increased second numbers.
Claim 5
Dependent Claim 342 words
In a data processing machine a system for extracting the square root of a given number comprising: a first storage register initially containing said given number; a second storage register initially containing the digit five in the least significant digit position; digit shifting means for dividing the contents of said first storage register in half; first iterative means including: means coupled to said first and second storage registers for obtaining the difference between the numbers in said storage registers and for storing said difference in said first storage register; means coupled to said first storage register for detecting overflow of said first storage register to indicate whether said difference is positive or negative; means coupled to said overflow detecting means and operable each time a positive difference is indicated for consecutively advancing from zero the digit in the position next more significant than the digit five in said second storage register; and means coupled to said overflow detecting means for counting each positive difference entered into said first storage register; second iterative means operable after the first time said overflow detecting means indicates a negative difference in said first storage means, said second iterative means including: means for storing the count of said counting means and for setting said counting means to zero; means for restoring said first storage register to the positive difference which immediately preceded said first negative difference; means operable after said possible difference is restored for decreasing the significance of all digits in said second storage register by one digit position; means operable after the digits in said second storage register are decreased by one degree of significance for decreasing the significance of said digit five in said second storage register by an additional digit position; means coupled to said difference obtaining means and operable after said last-named digit decreasing means for returning operation to said first iterative means; whereby the square root of said given number is represented from the most significant to the least significant digit by the succession of stored counts from said counting means.
Claim 6
Dependent Claim 342 words
In a data processing machine a system for extracting the square root of a given number comprising: a first storage register initially containing said given number; a second storage register initially containing the digit five in the least significant digit position; digit shifting means for dividing the contents of said first storage register in half; first iterative means including: means coupled to said first and second storage registers for obtaining the difference between the numbers in said storage registers and for storing said difference in said first storage register; means coupled to said first storage register for detecting overflow of said first storage register to indicate whether said difference is positive or negative; means coupled to said overflow detecting means and operable each time a positive difference is indicated for consecutively advancing from zero the digit in the position next more significant than the digit five in said second storage register; and means coupled to said overflow detecting means for counting each positive difference entered into said first storage register; second iterative means operable after the first time said overflow detecting means indicates a negative difference in said first storage means, said second iterative means including: means for storing the count of said counting means and for setting said counting means to zero; means for restoring said first storage register to the positive difference which immediately preceded said first negative difference; means operable after said possible difference is restored for decreasing the significance of all digits in said second storage register by one digit position; means operable after the digits in said second storage register are decreased by one degree of significance for decreasing the significance of said digit five in said second storage register by an additional digit position; means coupled to said difference obtaining means and operable after said last-named digit decreasing means for returning operation to said first iterative means; whereby the square root of said given number is represented from the most significant to the least significant digit by the succession of stored counts from said counting means.
Claim 7
Dependent Claim 41 words
The square root extracting system of claim 4, including means common to said difference obtaining means and said restoring means for complementing the contents of said first storage register and for adding the contents of said first and second storage registers.
Claim 8
Dependent Claim 28 words
The square root extracting system of claim 4, further including means for stopping the operation of said system when all digits in said second storage register are zero.

References Cited (Backward Citations)

US3049296A Cited
US3267267A Cited
US3280314A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-05-03 1974-11-02 1975-05-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-05-03 1978-11-02 1979-05-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-05-03 1982-11-02 1983-05-04 $7700.00 Window Closed / Lapsed

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