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US3562549A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor logic circuit

Assignee: Arbeitsstelle fuer Molekularelektronik
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Filing: 1968-05-21
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Granted: 1971-02-09
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Expires: 1988-05-21
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Abstract

Abstract A plurality of diode inputs is connected through a Zener diode clipper and amplifier circuit with a subsequent output stage so that the Zener voltage determines the initial shifting voltage level. To change this initial level, a conventional negator controls a transistor connected in parallel with said clipper and amplifier circuits, and turns off the latter in dependence on the output condition.

Inventors

  • 👤 Juergen Teichmann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 20:08
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/084

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 57 words
The logic circuit according to claim 1, wherein said clipping stage includes an amplifying means and at least one Zener diode connected to said input means, a current amplifying transistor having a base electrode thereof connected to said Zener diode and having the emitter electrode thereof coupled to said output control stage through a forward poled diode.
Claim 2
Dependent Claim 57 words
The logic circuit according to claim 1, wherein said switching stage comprises a transistor device having base, emitter and collector electrodes, and a plurality of diodes arranged in series in the emitter-collector path of said switching stage, said emitter-collector path being connected in parallel with said clipping stage, and means connecting said emitter to said negator stage.
Claim 3
Dependent Claim 128 words
A semiconductor logic circuit comprising a source of operating voltage having first and second terminals, a current path connected between said first and second terminals and comprising in the order named a resistor, a voltage clipping device, a first amplifying means, and output amplifying means; a plurality of input terminals, separate diode means for connecting said input terminals to the junction of said resistor and voltage clipping device, whereby said output amplifying means produces a first output logic voltage level when the voltage at said input terminals exceeds a given voltage level; and circuit means connected to the output of said output amplifying means and responsive to said first output voltage level for establishing a current path in parallel with said voltage clipping device and first amplifying means.
Claim 4
Dependent Claim 57 words
The semiconductor logic circuit of claim 5 wherein said circuit means comprises a transistor having its collector-emitter path connected in parallel with said voltage clipping device and first amplifying means, a transistor amplifier connected to said output of said output amplifying means, and means connecting the output of said transistor amplifier to the base of said transistor.
Claim 5
Dependent Claim 26 words
The semiconductor logic circuit of claim 5 wherein said current path further comprises a diode connected between said first amplifying means and said output amplifying means.
Claim 6
Dependent Claim 47 words
The semiconductor logic circuit of claim 5 wherein said first amplifying means comprises a transistor having its base connected to one terminal of said voltage clipping device, its collector connected to said first terminal, and means connecting the emitter of said transistor to said output amplifying means.

References Cited (Backward Citations)

US3458719A Cited
US3445680A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-02-08 1974-08-10 1975-02-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-02-08 1978-08-10 1979-02-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-02-08 1982-08-10 1983-02-09 $7700.00 Window Closed / Lapsed

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