Patent US3443172A successfully refreshed from Google Patents.
US3443172A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low capacitance field effect transistor
Assignee: Monsanto Co
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Filing: 1965-11-16
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Granted: 1969-05-06
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Expires: 1985-11-16
Abstract
No abstract record available.
Inventors
- 👤 Ronald L Koepp
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 22:05
CPC Classifications
H; H10; H10D; H10D99/00; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/10; Y; Y10; Y10S; Y10S148/00; Y10S148/053; Y10S148/085
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
127 words
A LOW CAPACITANCE FIELD TRANSISTOR UNIT COMPRISING, (A) A LDAYER OF POLYSILICON HAVING INWARDLY SLOPING EDGES IN ITS UPPER PORTION, SAID EDGES SURROUNDING A SUBSTANTIALLY FLAT PLATEAU FORMING THE UPPER SURFACE OF SAID POLYSILICON LAYER, (B) A SILICON DIOXIDE COATING COVERING THE EDGES AND PLATEAU OF SAID POLYSILICON, (C) A SILICON SEMICONDUCTOR COVERING SAID COATING AND HAVING AN UPPER PLANE WHICH INTERSECTS THE TOP OF THE SILICON DIOXIDE COATING COVERING THE TOP OF SAID EDGES, (D) A SMALL THICKNESS OF P-TYPE CONDUCTIVITY IN SAID SEMICONDUCTOR ADJACENT TO THE SILICON DIOXIDE COVERING SAID EDGES, (E) A FIRST CHANNEL OF P-TYPE CONDUCTIVITY IN SAID SEMICONDUCTOR LYING ON THE SILICON DIOXIDE COATING OVER THE PLATEAU AND EXTENDING TO THE SMALL THICKNESS OF P-TYPE CONDUCTIVITY IN OPPOSITE SIDES OF THE PLATEAU,
Claim 2
Dependent Claim
127 words
A LOW CAPACITANCE FIELD TRANSISTOR UNIT COMPRISING, (A) A LDAYER OF POLYSILICON HAVING INWARDLY SLOPING EDGES IN ITS UPPER PORTION, SAID EDGES SURROUNDING A SUBSTANTIALLY FLAT PLATEAU FORMING THE UPPER SURFACE OF SAID POLYSILICON LAYER, (B) A SILICON DIOXIDE COATING COVERING THE EDGES AND PLATEAU OF SAID POLYSILICON, (C) A SILICON SEMICONDUCTOR COVERING SAID COATING AND HAVING AN UPPER PLANE WHICH INTERSECTS THE TOP OF THE SILICON DIOXIDE COATING COVERING THE TOP OF SAID EDGES, (D) A SMALL THICKNESS OF P-TYPE CONDUCTIVITY IN SAID SEMICONDUCTOR ADJACENT TO THE SILICON DIOXIDE COVERING SAID EDGES, (E) A FIRST CHANNEL OF P-TYPE CONDUCTIVITY IN SAID SEMICONDUCTOR LYING ON THE SILICON DIOXIDE COATING OVER THE PLATEAU AND EXTENDING TO THE SMALL THICKNESS OF P-TYPE CONDUCTIVITY IN OPPOSITE SIDES OF THE PLATEAU,
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1972-05-05 | 1972-11-04 | 1973-05-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1976-05-05 | 1976-11-04 | 1977-05-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1980-05-05 | 1980-11-04 | 1981-05-06 | $7700.00 | Window Closed / Lapsed |