Encoded synchronous demodulator circuit

Claim 1

IN AN ENCODED SIGNAL DATA DEMODULATOR CIRCUIT: SIGNAL INPUT MEANS CONSTRUCTED FOR RECEIVING TWO INPUT SIGNALS WITH ONE FROM A CLOCK SIGNAL SOURCE AND THE OTHER FROM A DATA MODULATED CLOCK SIGNAL TIMED SIGNAL SOURCE; SAID SIGNAL INPUT MEANS INCLUDING A CIRCUIT HAVING TWO OUTPUT CONNECTIONS ACROSS WHICH WITH ONE PHASE RELATION OF THE TWO INPUT SIGNALS THERE IS A SIGNAL CANCELLING EFFECT, AND WITH THE OPPOSITE PHASE RELATION THERE IS A SIGNAL ADDITIVE EFFECT; A FIRST SIGNAL RECTIFYING CIRCUIT CONNECTED TO ONE OF SAID OUTPUT CONNECTIONS AND TO A VOLTAGE POTENTIAL REFERENCE SOURCE, AND A SECOND SIGNAL RECTIFYING CIRCUIT CONNECTED TO THE OTHER OF SAID OUTPUT CONNECTIONS AND TO THE VOLTAGE POTENTIAL REFERENCE SOURCE; A SIGNAL VOLTAGE CHARGING DEVICE CONNECTED BETWEEN THE FIRST SIGNAL RECTIFYING CIRCUIT AND THE VOLTAGE POTENTIAL REFERENCE SOURCE; VOLTAGE BIAS CONTROLLED TO CONDUCTIONAND-NON-CONDUCTION MEANS CONNECTED ACROSS SAID CHARGING DEVICE; A SIGNAL SUMMING CIRCUIT CONNECTED BETWEEN SAID FIRST AND SECOND SIGNAL RECTIFYING CIRCUITS; SIGNAL PATH MEANS CONNECTING SAID SIGNAL SUMMING CIRCUIT AND A VOLTAGE THRESHOLD LEVEL ACTIVATED CIRCUIT PROVIDING A RESULTANT TWO VOLTAGE LEVEL SIGNAL WAVEFORM AS DETERMINED BY THE SIGNAL WAVEFORM OUT OF THE SUMMING CIRCUIT; OUTPUT SIGNAL CIRCUIT PATH MEANS FROM SAID VOLTAGE THRESHOLD LEVEL ACTIVATED CIRCUIT; AND CONTROL FEEDBACK CIRCUIT SIGNAL MEANS INTERCONNECTING SAID OUTPUT SIGNAL CIRCUIT PATH MEANS AND SAID VOLTAGE BIAS CONTROLLED TO CONDUCTION-AND-NON-CONDUCTION MEANS.