Patent US20070187828A1 successfully refreshed from Google Patents.
US20070187828A1
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US
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Ild layer with intermediate dielectric constant material immediately below silicon dioxide based ild layer
Assignee: GlobalFoundries Inc
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Filing: 2006-02-14
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Granted: —
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Expires: 2026-02-14
Abstract
Abstract An integrated circuit (IC) chip and related package are disclosed including a first interlevel dielectric (ILD) layer(s) including an ultra low dielectric constant (ULK) material, a second ILD layer(s) including a silicon dioxide (SiO 2 ) based dielectric material above the first ILD layer(s), and a transitional ILD layer including an intermediate dielectric constant material. The transitional ILD layer is positioned directly below a lowermost one of the second ILD layer(s), excepting any isolation layer, which represents the layer most susceptible to failure. The intermediate dielectric constant material can have a dielectric constant and an elastic modulus greater than that of the ULK material and less than that of the SiO 2 based dielectric material. Hence, the intermediate dielectric constant provides adequate electrical properties, but also absorbs more of the stress than the typical ULK material, which reduces the likelihood of failure. A method of forming the IC chip is also disclosed.
Inventors
- 👤 Mukta Farooq
- 👤 Robert Hannon
- 👤 Ian Melville
- 👤 Donna Zupanski-Nielsen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 07:04
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/47; H10W20/01; H10W20/071; H10W20/48
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
101 words
1 . A method of forming a multi-level interconnect structure of an integrated circuit chip, the method comprising the steps of: forming at least one first interlevel dielectric (ILD) layer including an ultra low dielectric constant (ULK) material; forming at least one second ILD layer including a silicon dioxide (SiO 2 ) based dielectric material, the at least one second ILD layer positioned above the at least one first ILD layer; and forming, immediately prior to a lowermost one of the at least one second ILD layer, excepting any isolation layer, a transitional ILD layer including an intermediate dielectric constant material.
Claim 2
Dependent Claim
101 words
1 . A method of forming a multi-level interconnect structure of an integrated circuit chip, the method comprising the steps of: forming at least one first interlevel dielectric (ILD) layer including an ultra low dielectric constant (ULK) material; forming at least one second ILD layer including a silicon dioxide (SiO 2 ) based dielectric material, the at least one second ILD layer positioned above the at least one first ILD layer; and forming, immediately prior to a lowermost one of the at least one second ILD layer, excepting any isolation layer, a transitional ILD layer including an intermediate dielectric constant material.
Claim 3
Dependent Claim
31 words
2 . The method of claim 1 , wherein the at least one first ILD layer other than an uppermost first ILD layer has a dielectric constant less than approximately 2.7.
Claim 4
Dependent Claim
27 words
3 . The method of claim 1 , wherein the ULK material of an uppermost first ILD layer has a dielectric constant of less than approximately 2.8.
Claim 5
Dependent Claim
31 words
4 . The method of claim 1 , wherein the intermediate dielectric constant material has a dielectric constant of greater than approximately 2.8 and less than or equal to approximately 3.0.
Claim 6
Dependent Claim
39 words
5 . The method of claim 1 , wherein the intermediate dielectric constant material has a dielectric constant greater than that of the ULK material and less than that of the silicon dioxide (SiO 2 ) based dielectric material.
Claim 7
Dependent Claim
39 words
6 . The method of claim 1 , wherein the intermediate dielectric constant material has an elastic modulus greater than that of the ULK material and less than that of the silicon dioxide (SiO 2 ) based dielectric material.
Claim 8
Dependent Claim
88 words
7 . An integrated circuit chip comprising: at least one first interlevel dielectric (ILD) layer including an ultra low dielectric constant (ULK) material; at least one second ILD layer including a silicon dioxide (SiO 2 ) based dielectric material, the at least one second ILD layer positioned above the at least one first ILD layer; and a transitional ILD layer including an intermediate dielectric constant material, the transitional ILD layer, excepting any isolation layer, positioned directly below a lowermost one of the at least one second ILD layer.
Claim 9
Dependent Claim
88 words
7 . An integrated circuit chip comprising: at least one first interlevel dielectric (ILD) layer including an ultra low dielectric constant (ULK) material; at least one second ILD layer including a silicon dioxide (SiO 2 ) based dielectric material, the at least one second ILD layer positioned above the at least one first ILD layer; and a transitional ILD layer including an intermediate dielectric constant material, the transitional ILD layer, excepting any isolation layer, positioned directly below a lowermost one of the at least one second ILD layer.
Claim 10
Dependent Claim
34 words
8 . The integrated circuit chip of claim 7 , wherein the at least one first ILD layer other than an uppermost first ILD layer has a dielectric constant of less than approximately 2.7.
Claim 11
Dependent Claim
29 words
9 . The integrated circuit chip of claim 7 , wherein the ULK material of an uppermost first ILD layer has a dielectric constant of less than approximately 2.8.
Claim 12
Dependent Claim
33 words
10 . The integrated circuit chip of claim 7 , wherein the intermediate dielectric constant material has a dielectric constant of greater than approximately 2.8 and less than or equal to approximately 3.0.
Claim 13
Dependent Claim
24 words
11 . The integrated circuit chip of claim 7 , wherein the at least one second ILD layer includes only one second ILD layer.
Claim 14
Dependent Claim
41 words
12 . The integrated circuit chip of claim 7 , wherein the intermediate dielectric constant material has a dielectric constant greater than that of the ULK material and less than that of the silicon dioxide (SiO 2 ) based dielectric material.
Claim 15
Dependent Claim
41 words
13 . The integrated circuit chip of claim 7 , wherein the intermediate dielectric constant material has an elastic modulus greater than that of the ULK material and less than that of the silicon dioxide (SiO 2 ) based dielectric material.
Claim 16
Dependent Claim
117 words
14 . An integrated circuit chip package comprising: a substrate; an integrated circuit (IC) chip including a multi-level interconnect structure including: at least one first interlevel dielectric (ILD) layer including an ultra low dielectric constant (ULK) material, at least one second ILD layer including a silicon dioxide (SiO 2 ) based dielectric material, the at least one second ILD layer positioned above the at least one first ILD layer, and a transitional ILD layer including an intermediate dielectric constant material, the transitional ILD layer, excepting any isolation layer, positioned directly below a lowermost one of the at least one second ILD layer; and a plurality of electrically conductive interconnections between the substrate and the integrated circuit chip.
Claim 17
Dependent Claim
117 words
14 . An integrated circuit chip package comprising: a substrate; an integrated circuit (IC) chip including a multi-level interconnect structure including: at least one first interlevel dielectric (ILD) layer including an ultra low dielectric constant (ULK) material, at least one second ILD layer including a silicon dioxide (SiO 2 ) based dielectric material, the at least one second ILD layer positioned above the at least one first ILD layer, and a transitional ILD layer including an intermediate dielectric constant material, the transitional ILD layer, excepting any isolation layer, positioned directly below a lowermost one of the at least one second ILD layer; and a plurality of electrically conductive interconnections between the substrate and the integrated circuit chip.
Claim 18
Dependent Claim
35 words
15 . The integrated circuit chip package of claim 14 , wherein the at least one first ILD layer other than an uppermost first ILD layer has a dielectric constant of less than approximately 2.7.
Claim 19
Dependent Claim
30 words
16 . The integrated circuit chip package of claim 14 , wherein the ULK material of an uppermost first ILD layer has a dielectric constant of less than approximately 2.8.
Claim 20
Dependent Claim
34 words
17 . The integrated circuit chip package of claim 14 , wherein the intermediate dielectric constant material has a dielectric constant of greater than approximately 2.8 and less than or equal to approximately 3.0.
Claim 21
Dependent Claim
25 words
18 . The integrated circuit chip package of claim 14 , wherein the at least one second ILD layer includes only one second ILD layer.
Claim 22
Dependent Claim
44 words
19 . The integrated circuit chip package of claim 14 , wherein the substrate has a coefficient of thermal expansion (CTE) of approximately 6 parts per million per degree Celsius (ppm/° C.), and the IC chip has a CTE of approximately 3 ppm/° C.
Claim 23
Dependent Claim
42 words
20 . The integrated circuit chip package of claim 14 , wherein the intermediate dielectric constant material has a dielectric constant greater than that of the ULK material and less than that of the silicon dioxide (SiO 2 ) based dielectric material.
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