Nonvolatile semiconductor memory device and manufacture thereof

Abstract

Abstract PURPOSE:To implement a memory transistor, in which the capacitance between a drain and a floating gate is small, high-speed writing is possible and a writing part and a reading part form a unitary body, by arranging an impurity region, which is connected to the drain, in a self-aligning manner together with a charge injecting region in a gate insulating film. CONSTITUTION:A second conductivity type impurity region 4, which is connected to a drain (or source) 9b, is provided on one main surface of a first conductivity type semiconductor substrate 1. A fioating gate 6b is formed on the impurity region 4 through a gate insulating film 3b, which is provided with a charge injecting region 5. Said impurity region 4 and the charge injecting region 5 are arranged in a self- aligning manner. For example, on the surface of the P type substrate 1, the following regions are provided: N<+> type drain regions 9a and 9b ; the charge injecting N<+> type region 4, which is connected to the region 9b through an N type impurity region 2; and an N<+> type source region 9c. Selecting gates 6a and 8a are laminated on the substrate 1 between the regions 9a and 9b through gate insulating films 3a and 7a. The floating gate 6b and a control gate 8b are laminated through the insulating film 3b, which becomes the thin tunnel insulating film 5 on the region 4, and another insulating film 7b.

Inventors

• 👤 Susumu Hasunuma
• 👤 蓮沼　晋

Bibliographic Details