Semiconductor integrated circuit device
Abstract
Abstract PURPOSE:To augment the integration density while preventing a leak phenomenon between memorizing capacity elements from happening by a method wherein the first conductive plate comprising a memorizing capacity element is electrically connected to one semiconductor region and then the second conductor plate is composed of a semiconductor substrate while an MISFET is arranged on the upper part of the memorizing capacity element. CONSTITUTION:An insulating film 6 stores e.g. hole charges to be any data utilizing the first electrode of a capacity element (the first conductive plate) and the second electrode of the capacity electrode (the second conductive plate). A connecting hole 7 electrically connects the first conductive plate to one semiconductor region MISFETQ. An N<+> type semiconductor region 8 provided near the surface of a semiconductor substrate 1 of the connecting hole 7 electrically connects the first conductive plate to the other semiconductor region of MISFETQ. A memorizing capacity element C is composed of the first conductive plate 9 provided with one end thereof electrically connecting to one semiconductor region of MISFET through the intermediary of the connecting hole 7 and the semiconductor region 8.
Inventors
- 👤 Mitsumasa Koyanagi
- 👤 光正 小柳
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
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