Semiconductor device

Abstract

Abstract PURPOSE:To attain high speeds and high integration by a method wherein polycrystalline Si is formed by self-alignment on the low-density source and drain of an MOS transistor and a lower-resistance metal or silicide layer is formed by self-alignment on said polycrystalline Si. CONSTITUTION:An oxide film is formed on a P type Si substrate 7 and the oxide film is trimmed for the formation of an activation region and a field oxide film 10. Then a gate insulating film 15 is formed in the activation region. P type impurity ions such as of B is injected under high energy into the Si substrate 7 for the formation of a P type region 16. A gate electrode 17 is composed of such a metal as W or a silicide or polycrystalline Si, whereafter ions of an N type impurity such as P or As are injected for the formation of low- density source, drain regions 19. Next, an insulating film 20 is formed, which is then subjected to etching, with a space 21 retained at the step. Densely doped N type polycrystalline Si layers 22, layers 23 of such a metal as W or a silicide are formed selectively.

Inventors

• 👤 Yoshio Sakai
• 👤 芳男 酒井
• 👤 Shiyoujirou Sugashiro
• 👤 菅城　象二郎
• 👤 Nobuyoshi Kobayashi
• 👤 伸好 小林
• 👤 Yoshifumi Kawamoto
• 👤 川本　佳史
• 👤 Yasuo Wada
• 👤 恭雄 和田
• 👤 Yoshio Honma
• 👤 喜夫 本間

Bibliographic Details