← Back to Patent Explorer
JPS5871652A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor memory device

Assignee: Hitachi Ltd
•
Filing: 1981-10-26
•
Granted: —
•
Expires: 2001-10-26
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To extend the operating margin of a semiconductor memory circuit and to accelerate the reading speed of the memory by remarkably reducing the resistance of a power feeding line, thereby eliminating the reduction in the reading signal potential difference due to the resistance of the feeding line. CONSTITUTION:An aluminum layer 8a is contacted with a P type well region 3a and an N type region 4c, thereby forming a power feeding line corresponding to a ground potential feeding line GND1. Similarly, aluminum layers 8d, 8g respectively form power feeding lines corresponding to ground potential feeding lines GND2, GND3. Aluminum layers 8b, 8c respectively form data lines corresponding to data lines D1, D1', and 8e, 8f similarly respectively form data lines corresponding to data lines D2, D2'.

Inventors

  • 👤 Takashi Oba
  • 👤 大場 隆

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 00:03
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

JPS5570060A Cited
JPS5750384A Cited
JPS5756958A Cited

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag