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JPS5756958A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Toshiba Corp
•
Filing: 1980-09-22
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Granted: —
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Expires: 2000-09-22
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Abstract

Abstract PURPOSE:To accelerate the memory cell of a static RAM, for example, and to form a structure for preventing the stepwise disconnection by forming metallic silicide layer in parallel on a polysilicon layer and connecting them through an insulating film, thereby reducing the wiring resistance. CONSTITUTION:A contacting hole is formed at a substrate 1 formed with a field film 2 and a gate film 3, and the first polysilicon (phosphorus-doped) layer 4 for gate electrode or the like is then formed. Then, an insulating film 5 is covered, and the second polysilicon pattern 6 to become a resistor and an MoSi2 film 7 is, for example, formed on the film 5. The pattern 7 is so formed as to superpose on the gate wiring polysilicon 4, and is connected in parallel at the plural positions. Then, an insulating film 8 is accumulated, an upper aluminum layer is formed, and a circuit device is formed. In this manner, a wording wire can be reduced in resistance of the RAM or the like, the polysilicon of the second layer and the silicide can be formed in the same level, thereby reducing the stepwise difference.

Inventors

  • 👤 Shoji Ariizumi
  • 👤 Makoto Segawa

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 11:55
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10B; H10B10/00; H10B10/15; H10D84/00

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS52106693A Cited
JPS55120150A Cited

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