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EP0635880A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method of manufacturing a transistor using silicon on insulator technology

Assignee: Commissariat à l'Énergie Atomique et Aux Énergies Alternatives
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Filing: 1994-07-20
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Granted: —
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Expires: 2014-07-20
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Abstract

Abstract Translated from French Ce procédé consiste en particulier à réaliser une couche mince de silicium (6) sur un isolant (4), puis un masque (8, 10) comprenant une ouverture (13) à l'emplacement prévu pour le canal (26) du transistor ; oxyder localement (14) le silicium non masqué ; éliminer le masque ; réaliser une implantation ionique (16) de source (18) et drain (20) dans le silicium, l'oxydation locale servant de masque à cette implantation ; éliminer l'oxydation locale ; réaliser l'isolant mince de grille entre la source et le drain, puis la grille. This method consists in particular in producing a thin layer of silicon (6) on an insulator (4), then a mask (8, 10) comprising an opening (13) at the location provided for the channel (26) of the transistor; locally oxidizing (14) unmasked silicon; remove the mask; perform an ion implantation (16) of source (18) and drain (20) in silicon, the local oxidation serving as a mask for this implantation; eliminate local oxidation; make the thin grid insulation between the source and the drain, then the grid.

Inventors

  • 👤 Benôit Giffard

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 09:41
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6757; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/6704; H10D30/6713; Y; Y10; Y10S; Y10S148/00; Y10S148/15

Claims Analysis

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References Cited (Backward Citations)

JPS5999772A Cited
JPS6148976A Cited
EP0377084A1 Cited
US5116771A Cited
JPH04113677A Cited
JPH0590589A Cited

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