EP0377084A1
Expired / Lapsed
EP
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Field effect transistor on an insulator and method of manufacturing same
Assignee: Toshiba Corp
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Filing: 1989-10-03
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Granted: —
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Expires: 2009-10-03
Abstract
Abstract A field effect transistor is formed on an insulating film (12, 42). The thickness of the semiconductor layer (13, 43) where the transistor is formed, is adjusted to be less than a maximum distance allowable to complete the depletion of the layer. In further embodiments, the thickness of the channel region (48) is adjusted to be less than that of the source and drain regions (46, 47). The insulating layer (42) can be formed to have a convex portion under the channel region (48), and concave portions under the source and drain regions (46, 47). The semiconductor layer where the transistor is formed can have steps at the boundaries between the channel region (68) and the source and drain regions (66, 67), so that the top face of the channel region (68) is lower than the top faces of the source and drain regions (66, 67).
Inventors
- 👤 Minoru Takahashi
- 👤 Makoto Yoshimi
- 👤 Naoyuki Shigyo
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 09:42
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/674; H10D30/6757
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
83 words
A semiconductor device, comprising: a pair of source region (16) and drain region (17) respectively comprising high-concentration-impurity-diffusion regions and provided at a predetermined interval in a semiconductor layer (13) formed on an insulating film; and a gate electrode (15) formed on a channel region (18) interposed between said impurity-diffusion regions through a gate insulating film (14); wherein a thickness (T) of said semiconductor layer is so adjusted as to be smaller than a maximum distance allowable to complete depletion of said semiconductor layer.
Claim 2
Dependent Claim
83 words
A semiconductor device, comprising: a pair of source region (16) and drain region (17) respectively comprising high-concentration-impurity-diffusion regions and provided at a predetermined interval in a semiconductor layer (13) formed on an insulating film; and a gate electrode (15) formed on a channel region (18) interposed between said impurity-diffusion regions through a gate insulating film (14); wherein a thickness (T) of said semiconductor layer is so adjusted as to be smaller than a maximum distance allowable to complete depletion of said semiconductor layer.
Claim 3
Dependent Claim
24 words
A semiconductor device according to claim 1, wherein said impurity-diffusion regions (16, 17) and said channel region (18) are of the same conductive type.
Claim 4
Dependent Claim
26 words
A semiconductor device according to claim 1, wherein said impurity-diffusion regions (16, 17) and said channel region (18) are of different conductive types from each other.
Claim 5
Dependent Claim
35 words
A semiconductor device according to claim 1, 2, or 3, wherein said thickness of the channel region (48) is so adjusted as to be smaller than said thickness of said impurity- diffusion regions (46, 47).
Claim 6
Dependent Claim
46 words
A semiconductor device according to claim 1, 2, or 3, wherein said insulating film (42) has a convex portion under said channel portion (48) of said semiconductor layer to be formed on said insulating film (42), and concave portions respectively under said impurity-diffusion regions (46, 47).
Claim 7
Dependent Claim
51 words
A semiconductor device according to claim 1, 2, or 3, wherein said semiconductor layer has steps at boundaries between said channel region (68) and said impurity-diffusion regions (66, 67), and the top face of said channel region (68) is lower than the top faces of said impurity diffusion regions (66, 67).
Claim 8
Dependent Claim
77 words
A semiconductor device according to claim 1, 2, or 3, wherein the thickness of said channel region (96) is smaller than the thickness of said impurity-diffusion regions (97, 98), and a region having a width less than the maximum depletion distance and an impurity concentration substantially the same or larger than that of said channel region (96) and less than that of said drain region is provided between said channel region (96) and said drain region (97).
Claim 9
Independent Claim
117 words
A method of manufacturing a semiconductor device comprising: a step for forming a single-crystal semiconductor layer (43) on an insulating film (42) having convex portions; a step for adjusting the thickness of said semiconductor layer on the convex portions of said insulating film (42) into that less than the maximum depletion distance (T) of said semiconductor layer; a step for forming a gate electrode (45) on a portion located on one of the convex portions of said insulating film (42) through a gate insulating film (40); and a step for forming a source and a drain region (46, 47) by diffusion of an impurity into said semiconductor layer (43) using said gate electrode (45) as a mask.
Claim 10
Independent Claim
117 words
A method of manufacturing a semiconductor device comprising: a step for forming a single-crystal semiconductor layer (43) on an insulating film (42) having convex portions; a step for adjusting the thickness of said semiconductor layer on the convex portions of said insulating film (42) into that less than the maximum depletion distance (T) of said semiconductor layer; a step for forming a gate electrode (45) on a portion located on one of the convex portions of said insulating film (42) through a gate insulating film (40); and a step for forming a source and a drain region (46, 47) by diffusion of an impurity into said semiconductor layer (43) using said gate electrode (45) as a mask.
Claim 11
Independent Claim
97 words
A method of manufacturing a semiconductor device comprising: a step for forming concave portions by selective etching partly a semiconductor layer (63), and adjusting the thickness of said semiconductor layer at said concave portions into that less than the maximum depletion distance of said semiconductor layer (63); a step for forming a gate electrode (65) on the concave portion of said semiconductor layer (63) through a gate insulating film (64); and a step for forming a source and drain region by diffusion of an impurity into said semiconductor layer using said gate electrode (65) as a mask.
Claim 12
Independent Claim
97 words
A method of manufacturing a semiconductor device comprising: a step for forming concave portions by selective etching partly a semiconductor layer (63), and adjusting the thickness of said semiconductor layer at said concave portions into that less than the maximum depletion distance of said semiconductor layer (63); a step for forming a gate electrode (65) on the concave portion of said semiconductor layer (63) through a gate insulating film (64); and a step for forming a source and drain region by diffusion of an impurity into said semiconductor layer using said gate electrode (65) as a mask.
References Cited (Backward Citations)
GB2118365A
Cited
EP0129037A1
Cited
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