Doping process

Claim 2

The process of Claim 1 wherein said plurality of semiconductor devices includes both N-channel devices and P-channel devices, formed on one silicon substrate.

Claim 3

The process of Claim 2 wherein a first boron-containing glass formed on the surface of said silicon above said connector regions of said P-channel devices is used to dope said connector regions.

Claim 4

The process of Claim 3 wherein said first boron-containing glass contains about 0.5 to 4.5 wt% boron and is formed to a thickness of about 100 to 1,000 Å.

Claim 5

The process of Claim 4 wherein said thickness ranges from about 300 to 500 Å.

Claim 6

The process of Claim 2 wherein a phosphorus-containing glass formed on the surface of said silicon above said connector regions of said N-channel devices is used to dope said connector regions.

Claim 7

The process of Claim 6 wherein said phosphorus-containing glass contains about 2 to 7 wt% phosphorus and is formed to a thickness of about 100 to 1,000 Å.

Claim 8

The process of Claim 7 wherein said thickness ranges from about 300 to 500 Å.

Claim 9

The process of Claim 2 wherein a second boron-containing glass is formed on the surface of said silicon in trenches isolating said N-channel devices to prevent the trench sidewalls from inverting.

Claim 10

The process of Claim 9 wherein said second boron-containing glass contains about 0.5 to 2.5 wt% boron and is formed to a thickness of about 100 to 1,000 Å.

Claim 11

The process of Claim 10 wherein said thickness is about 500 Å.

Claim 12

The process of Claim 2 wherein a second phosphorus-containing glass is formed on the surface of said silicon in trenches isolating said P-channel devices to prevent the trench sidewalls from inverting.

Claim 13

The process of Claim 12 wherein said second phosphorus-containing glass contains about 3 to 7 wt% boron and is formed to a thickness of about 100 to 1,000 Å.

Claim 14

The process of Claim 13 wherein said thickness is about 500 Å.

Claim 15

The process of Claim 1 wherein said outdiffusing is done at about 800° to 1,100°C for a period of time ranging from about 10 seconds to 90 minutes.

Claim 16

The process of Claim 1 wherein prior to said out-diffusing, (a) an oxide layer is formed over said doped glass layers at a temperature less than about 800°C, (b) source, gate, and drain openings are formed through said oxide layer and through said underlying doped glass layer to expose said semiconductor, and (c) a thin oxide spacer film is formed on the walls of said gate opening.

Claim 17

The process of Claim 16 wherein said oxide spacer film is formed by employing tetra -ethyl orthosilicate, formed to a thickness of about 300 to 800 Å.

Claim 18

A process for in situ doping of portions of a plurality of semiconductor devices having source, gate, and drain regions, with connector regions therebetween, and with isolation trenches having sidewalls between neighboring devices, said process comprising forming a doped glass layer over said connector regions and subsequently, just prior to forming a gate oxide over said gate region, out-diffusing dopant from said doped glass layer and into said connector regions and said sidewalls.

Claim 19

The process of Claim 18 wherein said plurality of semiconductor devices includes both N-channel devices and P-channel devices, formed on one silicon substrate.

Claim 20

The process of Claim 19 wherein a first boron-containing glass formed on the surface of said silicon above said connector regions of said P-channel devices is used to dope said connector regions.

Claim 21

The process of Claim 20 wherein said first boron-containing glass contains about 0.5 to 4.5 wt% boron and is formed to a thickness of about 100 to 1,000 Å.

Claim 22

The process of Claim 21 wherein said thickness ranges from about 300 to 500 Å.

Claim 23

The process of Claim 19 wherein a phosphorus-containing glass formed on the surface of said silicon above said connector regions of said N-channel devices is used to dope said connector regions.

Claim 24

The process of Claim 23 wherein said phosphorus-containing glass contains about 2 to 7 wt% phosphorus and is formed to a thickness of about 100 to 1,000 Å.

Claim 25

The process of Claim 24 wherein said thickness ranges from about 300 to 500 Å.

Claim 26

The process of Claim 18 wherein said outdiffusing is done at about 800° to 1,100°C for a period of time ranging from about 10 seconds to 90 minutes.

Claim 27

The process of Claim 18 wherein prior to said out-iffusing, (a) an oxide layer is formed over said doped glass layers at a temperature less than about 800°C, (b) source, gate, and drain openings are formed through said oxide layer and through said underlying doped glass layer to expose said semiconductor, and (c) a thin oxide spacer film is formed on the walls of said gate opening.

Claim 28

The process of Claim 27 wherein said oxide spacer film is formed by employing tetra -ethyl orthosilicate, formed to a thickness of about 300 to 800 Å.

Claim 29

A process for in situ doping of portions of a semiconductor device having source, gate, and drain regions, with connector regions therebetween, said source, gate, and drain regions associated with either an N-well or a P-well in a silicon wafer, said wafer further provided with isolation trenches having sidewalls between neighboring devices, said process comprising: (a) depositing a first layer of a boron-containing glass on said substrate; (b) masking portions of said first layer of boron-containing glass and removing those portions not so masked to leave said masked portions defining P-channel areas; (c) densifying said first layer of boron-containing glass; (d) depositing a second layer of a phosphorus-containing glass on said substrate; (e) masking portions of said second layer of phosphorus-containing glass and removing those portions not so masked to leave said masked portions defining N-channel areas; (f) densifying said second layer of phosphorus-containing glass; (g) forming isolation regions in said silicon substrate to (1) define P-channel and N-channel device regions, and (2) to isolate N-channel devices from P-channel devices; (h) forming a first layer of oxide on said silicon substrate and planarizing said oxide; (i) etching through said first layer of oxide to form source, gate, and drain openings and interconnect openings; (j) forming a gate oxide on said silicon surface in said gate opening; (k) filling said openings with polysilicon to form source, gate, and drain plugs and doping said polysilicon plugs with an appropriate dopant; and (l) driving said dopants in said polysilicon to form said sources and drains in said silicon substrate and to simultaneously dope said silicon associated with said connector areas from said glass thereabove.

Claim 30

The process of Claim 29 wherein said isolation regions comprise trenches, said process additionally comprising, following step (g), (g1) depositing a third layer of a boron-containing glass, including along the bottoms and sidewalls of said trenches; and (g2) removing those portions of said third layer of boron-containing glass from P-channel trench areas and P-channel surface areas, such that in step (l), said silicon defining said N-channel trench sidewalls is also doped.

Claim 31

The process of Claim 30 wherein said third layer of boron-containing glass contains about 0.5 to 2.5 wt% boron and is formed to a thickness of about 100 to 1,000 Å.

Claim 32

The process of Claim 31 wherein said thickness is about 500 Å.

Claim 33

The process of Claim 30 additionally comprising, following step (g2), (g3) depositing a fourth layer of a phosphorus-containing glass, including along the bottoms and sidewalls of said trenches; and (g4) removing those portions of said fourth layer of phosphorus-containing glass from N-channel trench areas and N-channel surface areas, such that in step (l), said silicon defining said P-channel trench sidewalls is also doped.

Claim 34

The process of Claim 33 wherein said fourth layer of phosphorus-containing glass contains about 3 to 7 wt% phosphorus and is formed to a thickness of about 100 to 1,000 Å.

Claim 35

The process of Claim 34 wherein said thickness is about 500 Å.

Claim 36

The process of Claim 29 wherein said first layer of boron-containing glass contains about 0.5 to 4.5 wt% boron and is formed to a thickness of about 100 to 1,000 Å.

Claim 37

The process of Claim 36 wherein said thickness ranges from about 300 to 500 Å.

Claim 38

The process of Claim 29 wherein said first layer of boron-containing glass and said second layer of phosphorus-containing glass are separately densified by heating to a temperature ranging from about 700° to 800°C in an inert atmosphere for about 10 to 30 minutes.

Claim 39

The process of Claim 29 wherein said second layer of phosphorus-containing glass contains about 2 to 7 wt% phosphorus and is formed to a thickness of about 100 to 1,000 Å.

Claim 40

The process of Claim 39 wherein said thickness ranges from about 300 to 500 Å.

Claim 41

The process of Claim 29 wherein said first oxide is formed by employing tetra -ethyl orthosilicate, formed to a thickness of about 1 to 1.5 µm.

Claim 42

The process of Claim 29 wherein said dopants are driven at a temperature of about 800° to 1,100°C in an inert atmosphere for about 10 seconds to 90 minutes.

Claim 43

The process of Claim 29 additionally comprising, prior to step (j), forming a thin oxide spacer film on the walls of said gate opening.

Claim 44

The process of Claim 43 wherein said oxide spacer film is formed by employing tetra -ethyl orthosilicate, formed to a thickness of about 300 to 800 Å.