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EP0374690A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Programmable fusible link structure allowing for plasma metal etching.

Assignee: National Semiconductor Corp
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Filing: 1989-12-12
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Granted: —
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Expires: 2009-12-12
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Abstract

Abstract A novel fuse structure and method for manufacture is taught which allows the use of plasma etching of metalization materials without inadvertently etching fuse materials, and vice versa. A layer of fuse material which will be patterned into fuse elements is formed on the surface of a substrate. In the fuse area, a layer of masking material is formed and patterned to define the to-be-formed fuse elements, and subsequently a barrier metal such as titanium tungsten is formed over the entire surface of the device. A layer of metallization is then formed on the entire surface of the device. A metal mask is then formed on the device and undesired portions of the metallization layer are removed to leave a desired metallization interconnect pattern. Simultaneously, portions of the layer of fuse material are removed in areas which are not protected by the remaining portions of the metalization layer or by the protective masking layer covering the desired fuses. The use of the masking layer over the desired fuse device serves as an etchant barrier during plasma etching of the metallization. In another embodiment, the aforementioned layer of fuse material is replaced with a layer, such as titanium tungsten, which serves both as the fuse elements and a barrier metal.

Inventors

  • 👤 Frank Marazita
  • 👤 John Easton Readdie
  • 👤 Brian Mcfarlane

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-05 07:59
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493

Claims Analysis

Total Claims: 26
Claim 1
Independent Claim 104 words
A method for forming a fuse in an integrated circuit comprising the steps of: forming a layer of fusible material (21) above a surface of a substrate (20); forming a patterned layer of masking material (22) over that portion of said layer of fusible material which is to remain intact in order to serve as a fuse; forming a layer of metallization (24) on the surface of the device; and exposing those portions of said metallization layer which are to be removed to an etchant, thereby removing said undesired portions of said metallization layer, said etchant not etching through said layer of masking material.
Claim 2
Independent Claim 104 words
A method for forming a fuse in an integrated circuit comprising the steps of: forming a layer of fusible material (21) above a surface of a substrate (20); forming a patterned layer of masking material (22) over that portion of said layer of fusible material which is to remain intact in order to serve as a fuse; forming a layer of metallization (24) on the surface of the device; and exposing those portions of said metallization layer which are to be removed to an etchant, thereby removing said undesired portions of said metallization layer, said etchant not etching through said layer of masking material.
Claim 3
Dependent Claim 35 words
A method as in claim 1 which further comprises the step of forming a layer of barrier material (23) on the surface of said layer of fusible material and said patterned layer of masking material.
Claim 4
Independent Claim 19 words
A method as in claims 1 or 2 wherein said layer of fusble material comprises tungsten or titanium tungsten.
Claim 5
Independent Claim 28 words
A method as in claims 1 or 2 wherein said layer of masking material comprises an oxide, a nitride, or a combination of an oxide and a nitride.
Claim 6
Independent Claim 28 words
A method as in claims 1 or 2 wherein said layer of metallization comprises aluminium, an alloy of aluminium, or a multiple layer structure including an antireflective coating.
Claim 7
Dependent Claim 22 words
A method as in claim 1 wherein said etchant is capable of etching said metallization and said fusible material without significant selectivity.
Claim 8
Dependent Claim 25 words
A method as in claim 2 wherein said etchant is capable of etching said metallization, said fusible material, and said barrier material without significant selectivity.
Claim 9
Independent Claim 14 words
A method as in claims 6 or 7 wherewin said etchant is a plasma.
Claim 10
Dependent Claim 16 words
A method as in claim 8 wherein said plasma comprises Cl₂, CCl₄, or a combination thereof.
Claim 11
Dependent Claim 28 words
A method as in claim 1 wherein said layer of fusible material comprises tungsten formed to a thickness within the range of approximately 200 Å to 500 Å.
Claim 12
Dependent Claim 29 words
A method as in claim 1 wherein said layer of fusible material comprises titanium tungsten formed to a thickness within the range of approximately 200 Å to 500 Å.
Claim 13
Dependent Claim 23 words
A method as in claim 7 wherein said layer of fusible material comprises tungsten and said layer of barrier material comprises titanium tungsten.
Claim 14
Dependent Claim 26 words
A method as in claim 12 wherein said layer of tungsten is formed to a thickness in the range of approximately 200 Å to 500 Å.
Claim 15
Dependent Claim 27 words
A method as in claim 12 wherein said layer of titanium tungsten is formed to a thickness within the range of approximately 1000 Å to 2000 Å.
Claim 16
Independent Claim 17 words
A method as in claims 1 or 2 wherein said fuse is substantially rectangular in plan view.
Claim 17
Dependent Claim 87 words
An integrated circuit structure comprising: a semiconductor substrate (20) having a top surface; a layer of fusible material (21) formed above said top surface of said substrate; a layer of masking material (22) formed above said layer of fusible material in a pattern defining the location of one or more fuses; a layer of metallization (24) formed above said top surface of said substrate, said layer of fusible material, and said layer of masking material, said layer of metallization being patterned into a desired electrical interconnect pattern.
Claim 18
Dependent Claim 87 words
An integrated circuit structure comprising: a semiconductor substrate (20) having a top surface; a layer of fusible material (21) formed above said top surface of said substrate; a layer of masking material (22) formed above said layer of fusible material in a pattern defining the location of one or more fuses; a layer of metallization (24) formed above said top surface of said substrate, said layer of fusible material, and said layer of masking material, said layer of metallization being patterned into a desired electrical interconnect pattern.
Claim 19
Dependent Claim 17 words
A structure as in claim 16 wherein said layer of fusible material comprises tungsten or titanium tungsten.
Claim 20
Dependent Claim 26 words
A structure as in claim 6 wherein said layer of masking material comprises an oxide, a nitride, or a combination of an oxide an a nitride.
Claim 21
Dependent Claim 30 words
A structure as in one of claims 16 or 18 wherein said layer of metallization comprises aluminium, an alloy of aluminium, or a multiple layer structure including an antireflective coating.
Claim 22
Dependent Claim 35 words
A structure as in one of claims 16 to 19 wherein said layer of fusible material comprises tungsten or titanium tungsten formed to a thickness within the range of approximately 200 Å to 500 Å.
Claim 23
Dependent Claim 35 words
A structure as in claim 16, 18, or 19, which further comprises a layer of barrier material formed between said layer of metallization and said layers of fusible material and patterned layer of masking material.
Claim 24
Dependent Claim 23 words
A structure as in claim 21 wherein said layer of fusible material comprises tungsten and said layer of barrier material comprises titanium tungsten.
Claim 25
Dependent Claim 26 words
A structure as in claim 22 wherein said layer of tungsten is formed to a thickness in the range of approximately 200 Å to 500 Å.
Claim 26
Dependent Claim 29 words
A structure as in claims 22 or 23 wherein said layer of titanium tungsten is formed to a thickness within the range of approximately 1000 Å to 2000 Å.

References Cited (Backward Citations)

EP0162145A1 Cited
US4740485A Cited

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