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EP0356346A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Large-scale integrated EPROM device

Assignee: STMicroelectronics SA
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Filing: 1989-07-31
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Granted: —
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Expires: 2009-07-31
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Abstract

Abstract The present invention relates to an electrically programmable nonvolatile memory, the memory points of which are formed by MOS transistors (T11, T12) with a floating gate (23) and which is composed of a network of word lines (LM1) extending along rows, and of bit lines (LB1, LB2) extending along columns. A constant potential line (B), which extends along a column, connects sources (22) of said transistors, is formed by a diffusion of a first type of conductivity, and is intercalated one in two between two bit lines. The drain region (21) of the first type of conductivity of each transistor is extended along a column to form a bit line (LB1, LB2). An insulation zone (24) extending along a column is disposed on that side of each bit line which is opposite a constant potential line (B). <IMAGE>

Inventors

  • 👤 Albert Bergemont

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-04 13:29
CPC Classifications
H; H10; H10B; H10B69/00; H10B41/00; H10B41/30; H10B41/40; H10B41/70; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/6891

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

US4373248A Cited
US4258466A Cited
GB2073484A Cited
EP0182198A2 Cited

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