Programming method for memory cells and circuit for carrying out this method

Abstract

Abstract The use is avoided of loading pumps for feeding bit lines when programming memory cells (2) connected to a bit line (11) by carrying out (19) a pre-loading of this bit line simultaneously with the neutralisation (17) of the selection of this bit line. Subsequently, the pre-loading potential is decoupled (19) and the effects of neutralisation are stopped (17). It is shown that by doing this the collapse is avoided of a single programming potential generator (VPP) employed to feed all the bit lines. This results in a space saving on installing circuits for controlling the memory cells of the memory plane. This method can be implemented in particular in page-mode programming of memories whose memory cells comprise floating-gate transistors of the EEPROM type. <IMAGE>

Inventors

• 👤 Christophe Chevalier
• 👤 Jacek Cabinet Ballot-Schmit Kowalski

Bibliographic Details