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EP0263222A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method of forming solder terminals for a pinless ceramic module

Assignee: International Business Machines Corp
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Filing: 1986-10-08
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Granted: —
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Expires: 2006-10-08
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Abstract

Abstract Disclosed is a method of forming solder terminals for a pinless ceramic module. The method is comprised of the following steps: a) forming a Metallized Ceramic (MC) substrate (11) having a pattern (12) of conductors formed onto its top surface (13) and an array of preformed via-holes (14), said conductors being terminated by eyelets (15) at the location of said via-holes; b) applying where desired a droplet of flux at each preformed via-hole opening of the bottom surface of the MC substrate to fill the via-holes by capillarity and form a glob of flux (19) at each opening; c) applying a solder preform (20) on each glob of flux to which it will adhere because of the adhesive property of the flux, the volume of the preform being substantially equal to the inner volume of the via hole plus the volume of the bump to be formed; d) heating to cause a solder reflow of the solder preform to fill the via-hole, and the inner volume of the eyelet with solder; and, e) cooling below the melting point of the solder whereby the molten solder solidifies to form solder terminals at each via-hole location simultaneously forming a solder column in the via-hole, a solder mound (23) at the top surface of the MC substrate which makes electrical connections with said eylets and solder bumps (22) at the bottom surface of the MC substrate (11).

Inventors

  • 👤 Alexis Bitaillou
  • 👤 Michel Joseph Grandguillot

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 21:36
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/3465; H05K3/3478; H10; H10W; H10W70/00; H10W70/01; H10W70/05; H10W70/095; H10W70/099; H05K1/00; H05K1/02; H05K1/03; H05K1/0306; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09572; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10666; H05K2201/10734; H05K2203/00; H05K2203/04; H05K2203/041; H05K2203/043; H05K2203/0485; H05K3/3489; H10W72/00; H10W72/01; H10W72/012; H10W72/01221; H10W72/01225

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 246 words
Method of forming solder terminals for a pinless module having solder bumps (22) appropriate for Surface Mounting Techniques to be bonded onto Printed Circuit Boards (PCB's) characterized in that it comprises the steps of a) forming a Metallized Ceramic (MC) substrate (11) having a pattern (12) of conductors formed onto its top surface (13) and an array of preformed via-holes (14), said conductors being terminated by eyelets (15) at the location of said via-holes; b) applying where desired a droplet of flux at each preformed via-hole opening of the bottom surface of the MC substrate, to fill the via-holes by capillarity and form a glob of flux (19) at each opening; c) applying a solder preform (20) on each glob of flux to which it will adhere because of the adhesive property of the flux, the volume of the preform being substantially equal to the inner volume of the via hole plus the volume of the bump to be formed; d) heating to cause a solder reflow of the solder preform to fill the via-hole, the inner volume of the eyelet with solder; and, e) cooling below the melting point of the solder whereby the molten solder solidifies to form solder terminals at each via-hole location simultaneously forming a solder column in the via-hole, a solder mound (23) at the top surface of the MC substrate which makes electrical connections with said eylets and solder bumps (22) at the bottom surface of the MC substrate (11).
Claim 2
Dependent Claim 246 words
Method of forming solder terminals for a pinless module having solder bumps (22) appropriate for Surface Mounting Techniques to be bonded onto Printed Circuit Boards (PCB's) characterized in that it comprises the steps of a) forming a Metallized Ceramic (MC) substrate (11) having a pattern (12) of conductors formed onto its top surface (13) and an array of preformed via-holes (14), said conductors being terminated by eyelets (15) at the location of said via-holes; b) applying where desired a droplet of flux at each preformed via-hole opening of the bottom surface of the MC substrate, to fill the via-holes by capillarity and form a glob of flux (19) at each opening; c) applying a solder preform (20) on each glob of flux to which it will adhere because of the adhesive property of the flux, the volume of the preform being substantially equal to the inner volume of the via hole plus the volume of the bump to be formed; d) heating to cause a solder reflow of the solder preform to fill the via-hole, the inner volume of the eyelet with solder; and, e) cooling below the melting point of the solder whereby the molten solder solidifies to form solder terminals at each via-hole location simultaneously forming a solder column in the via-hole, a solder mound (23) at the top surface of the MC substrate which makes electrical connections with said eylets and solder bumps (22) at the bottom surface of the MC substrate (11).
Claim 3
Dependent Claim 21 words
The method of claim 1 characterized in that step a), further comprises the step of: metallizing the sidewalls of said via-holes.
Claim 4
Dependent Claim 23 words
The method of claim 1 or 2 characterized in that said array of preformed via-holes is at the center of the MC substrate.
Claim 5
Dependent Claim 33 words
The method of claim 1, 2 or 3 characterized in that said solder preforms are solder balls of .7 mm in diameter and 90/10 Pb/Sn composition with a melting point of about 280°C.
Claim 6
Dependent Claim 24 words
The method of claim 4 characterized in that before step b), the MC substrate is turned upside down to have its bottom surface up.
Claim 7
Dependent Claim 43 words
The method of any above claim 1 to 5 characterized in that it comprises the further step of: f) joining silicon chips having 95/5 Pb/Sn solder bumps at a temperature of about 320°C, to the pattern of conductors formed atop the MC substrate.
Claim 8
Independent Claim 37 words
The method of any of above claims 1 to 5 characterized in that simultaneously to step d), a silicon chip having 90/10 Pb/Sn solder bumps is joined to the pattern of conductors formed atop the MC substrate.

References Cited (Backward Citations)

US3868724A Cited
EP0082902A1 Cited

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