Patent US6441690B1 successfully refreshed from Google Patents.
Patent EP0216246A1 successfully refreshed from Google Patents.
EP0216246A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Semiconductor programmable memory device
Assignee: Fujitsu Ltd
•
Filing: 1986-09-09
•
Granted: —
•
Expires: 2006-09-09
Abstract
Abstract A field programmable device such as PROM of which memory cell is composed of a series connection of capacitor (C) and diode (D) or FET (Q). The programming is done by forming a short circuit in an insulation film (341 of the capacitor (C) by electrical breakdown of the capacitor (C). The capacitor (C) is composed of first and second semiconductor layer (10a) and an insulation film (34) between them. By taking such semiconductor insulator semiconductor structure of the capacitor (C), the instability of the short circuits by its further oxidation is avoided. So the memory stored in the device have been stabilized, and the reliability have been increased. The insulation film (34) of the capacitor (C) is oxidized or nitrided by ion implantation of oxygen or nitrogen into the semiconductor substrate (10), or polycrystalline material.
Inventors
- 👤 Toshitaka Fukushima
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 18:42
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0483; G11C17/00; G11C17/14; G11C17/16; H; H10; H10B; H10B20/00; H10B20/20; H10B20/25; H10B69/00; H10D; H10D1/00; H10D1/60; H10D1/68
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
94 words
A semiconductor programmable device having a memory cell composed of a series connected capacitor (C) and a reverse current blocking device (D), said capacitor (C) being composed of a first semiconductor layer (40, 10a; 44; 44a, 44c; 56), an insulation film (34; 42;'46), and a second semiconductor layer (40, 10a; 36; 44b, 44d; 58) said memory cell being programmable by applying a high voltage to said capacitor (C) and forming a bypass circuit in said insulation film (34; 42; 46) of said capacitor (C) by dielectric breakdown of said insulation film (34; 42; 46).
Claim 2
Dependent Claim
94 words
A semiconductor programmable device having a memory cell composed of a series connected capacitor (C) and a reverse current blocking device (D), said capacitor (C) being composed of a first semiconductor layer (40, 10a; 44; 44a, 44c; 56), an insulation film (34; 42;'46), and a second semiconductor layer (40, 10a; 36; 44b, 44d; 58) said memory cell being programmable by applying a high voltage to said capacitor (C) and forming a bypass circuit in said insulation film (34; 42; 46) of said capacitor (C) by dielectric breakdown of said insulation film (34; 42; 46).
Claim 3
Dependent Claim
41 words
A semiconductor programmable device according to claim 1, wherein said first and second semiconductor layers (40, 10a) being a part of a semiconductor substrate (10), and said insulation film (34) being formed between said first and second semiconductor layers (40, 10a).
Claim 4
Dependent Claim
39 words
A semiconductor programmable device according to claim 1, wherein said first semiconductor layer-(44) being a polycrystalline semiconductor, said insulation film (42) being an oxide film, and said second semiconductor layer (36) being a part of said semiconductor substrate (10).
Claim 5
Dependent Claim
48 words
A semiconductor programmable device according to claim 1, wherein said first semiconductor layer (44) being a single crystal layer which is recrystallized from a polycrystalline semiconductor, said insulation film 42) being an oxide film, and said second semiconductor layer (36) being a part of said semiconductor substrate (10).
Claim 6
Dependent Claim
34 words
A semiconductor programmable device according to claim 1, wherein said first and second semiconductor layers being single crystal layer which is recrystallized from a polycrystalline semiconductor, and said insulation film being an oxide film.
Claim 7
Dependent Claim
30 words
A semiconductor programmable device according to claim 1, wherein said first and second semiconductor layers (40, 10a; 44 and 40, 10a; 36) being arranged vertically on said semiconductor substrate (10).
Claim 8
Dependent Claim
31 words
A semiconductor programmable device according to claim 1, wherein said that first and second semiconductor layers (44a, 44c; 56 and 44b, 44a; 58) being arranged laterally on said semiconductor substrate (10).
Claim 9
Dependent Claim
29 words
A semiconductor programmable device according to claims from 1 through 7, wherein said semiconductor (10) being silicon and said insulation film (34; 42; 46) being a silicon dioxide film.
Claim 10
Dependent Claim
26 words
A semiconductor programmable device according to claims form 1 through 7, wherein said semiconductor (10) being silicon and said insulation film being a silicon nitride film.
References Cited (Backward Citations)
US4322822A
Cited
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.