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EP0212678A2
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Cache storage synonym detection and handling means
Assignee: International Business Machines Corp
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Filing: 1981-10-05
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Granted: —
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Expires: 2001-10-05
Abstract
Abstract To handle synonyms for a store-in-cache (SIC), a processor cache directory (PD) is searched in a principle class addressed by a subset of bits taken from a processor request's logical address. The class address has both translatable and non-translatable bits. If any of the set-associative line entries in the principle class contains the request's translated address, the data is accessed in a corresponding line location in the cache. If the principle class does not have any entry with the request's translated address, a cache miss signal occurs which causes a line fetch command to be generated for main storage to fetch the required line. The line fetch command also causes synonym search circuits to generate the address of every potential synonym class by permutating the translatable bits in the principle class address provided in the line fetch command. Then each potential synonym class is accessed in a copy directory (CD) (which is a copy of essential information in all entries in PD) and compared to the translated request address in order to detect for any existing synonym.
Inventors
- 👤 Shiu Kwong Chan
- 👤 John Anthony Gerardi
- 👤 Bruce Lloyd Mcgilvray
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 12:11
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/10; G06F12/1027; G06F12/1045; G06F12/1054; G06F12/0802; G06F12/0806; G06F12/0815; G06F12/0817; G06F12/0822
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
306 words
Cache synonym control means for a data processing system having a store-in-cache (SIC) and an instruction execution unit (IE), comprising: set-associative cache directory means (62) for receiving main storage logical address requests from the IE, address translation means (32) for translating the logical address of an IE request into a requested translated address in main storage, class registering means for addressing classes in the set-associative directory for receiving a subset of bits in a requested logical address for providing a class address for selecting a class in the cache directory means, the subset of bits containing translatable bits and non-translatable bits and defining the address of a principle class, characterized in that there are provided: search control means for initially searching the cache directory means for the principle class in the class registering means, the search control means generating a miss signal if the translated address is not found in the principle class, address altering means responding to the miss signal by permutating the translatable bits of the principle class to a permutated value, the address altering means providing the permutated value to overlay the translatable bits in the class registering means to generate a synonym class address, additional search control means to control the search of each synonym class address provided to the class registering means by the address altering means, means for actuating the address altering means to generate a next permutated value for the class registering means after each class search controlled by the additional search control means, and means for capturing any permutated address for which the additional search control means finds the translated address in the cache directory means or indicates the translated address is not found in any synonym class address, whereby the capturing means detects any synonym class existing in the cache or detects that no synonym class exists.
Claim 2
Dependent Claim
306 words
Cache synonym control means for a data processing system having a store-in-cache (SIC) and an instruction execution unit (IE), comprising: set-associative cache directory means (62) for receiving main storage logical address requests from the IE, address translation means (32) for translating the logical address of an IE request into a requested translated address in main storage, class registering means for addressing classes in the set-associative directory for receiving a subset of bits in a requested logical address for providing a class address for selecting a class in the cache directory means, the subset of bits containing translatable bits and non-translatable bits and defining the address of a principle class, characterized in that there are provided: search control means for initially searching the cache directory means for the principle class in the class registering means, the search control means generating a miss signal if the translated address is not found in the principle class, address altering means responding to the miss signal by permutating the translatable bits of the principle class to a permutated value, the address altering means providing the permutated value to overlay the translatable bits in the class registering means to generate a synonym class address, additional search control means to control the search of each synonym class address provided to the class registering means by the address altering means, means for actuating the address altering means to generate a next permutated value for the class registering means after each class search controlled by the additional search control means, and means for capturing any permutated address for which the additional search control means finds the translated address in the cache directory means or indicates the translated address is not found in any synonym class address, whereby the capturing means detects any synonym class existing in the cache or detects that no synonym class exists.
Claim 3
Dependent Claim
38 words
Cache synonym control means as defined in claim 1, in which the set-associative cache directory means comprises, a processor cache directory (PD), and the additional search control means (512) controlling the search for synonym entries in the PD.
Claim 4
Dependent Claim
58 words
Cache synonym control means as defined in claim 1 or 2, in which the set-associative cache directory means comprises, a processor cache directory (PD 62) and a corresponding copy directory (CD) containing a copy of essential information in each entry in the corresponding PD, the additional search control means controlling the searching in the CD for synonym entries.
Claim 5
Dependent Claim
26 words
Cache control means, wherein are provided: command means for communicating a line invalidating command to PD control means for invalidating the synonym line entry in PD.
Claim 6
Dependent Claim
26 words
Cache control means, wherein are provided: command means for communicating a line invalidating command to PD control means for invalidating the synonym line entry in PD.
Claim 7
Dependent Claim
32 words
Cache control means as defined in one of the claims 1-4, and used in each processor of a multiprocessor system, wherein all search control means are activated simultaneously upon a cache miss.
Claim 8
Dependent Claim
174 words
Cache synonym control means as defined in one of the claims 1 to 5, further comprising, a plurality of line entries in the set-associative cache directory means associated with corresponding line positions in the SIC, each line position in SIC containing a plurality of word storage positions, an exclusive/readonly (EX) shareability bit position being provided in each line entry to control whether data in the corresponding word storage positions in SIC can be dublicated in the respective SIC or in another SIC for another IE in the data processing system, each line entry also containing a high-order position of the translated address assigned to the line entry, the search control means further comprising: means for detecting the state of the EX bit in a synonym line entry when the capturing means detects a synonym class having the requested translated address, whereby the manner of accessing the synonym line in the SIC corresponding to the detected synonym line entry is controlled by the detected state of the EX bit in the detected synonym line entry.
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