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EP0051745A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Cache storage hierarchy for a multiprocessor system

Assignee: International Business Machines Corp
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Filing: 1981-10-05
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Granted: —
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Expires: 2001-10-05
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Abstract

Abstract In a multiprocessor (MP) system each processor (CP) has an associated store-in-buffer cache (BCE) whose set-associative classes (lines) are designated exclusive (EX) or shareable by all processors (RO). The cache directories (PD) are addressed by the non-translatable address part and by some bits of the translatable address part so that cache synonyms occur. Accesses of a processor to its cache are either flagged exclusive (EX) for store instructions and operand fetches or shareable (RO) for instruction fetches. To reduce the number of castouts in case of cache conflicts the shareability of a new cache line brought in after a cache miss is determined from its original shareability, the type of access to be performed and the change status of the line. An exclusive (operand) fetch to a cache line a copy of which is in a remote processor and designated exclusive is changed to RO if no changes have been made to that line. A synonym designated RO in the processors own cache is, duplicated to speed up further accesses. Synonym detection in all caches is performed in parallel by permuting the translatable address bits. For faster operation each processor has a further cache directory (CD) which is used for synonym detection and cross-interrogation.

Inventors

  • 👤 Shiu Kwong Chan
  • 👤 Frederick Otto Flusche
  • 👤 John Anthony Gerardi
  • 👤 Richard Neil Gustafson
  • 👤 Bruce Lloyd Mcgilvray

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 11:01
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/10; G06F12/1027; G06F12/1045; G06F12/1054; G06F12/0802; G06F12/0806; G06F12/0815; G06F12/0817; G06F12/0822

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 128 words
L. Storage hierarchy for a multiprocessor (MP) system, where each processor ( CP O, CPl ...) has an associated store-in-buffer cache (BCE) with set-associative organization, each associative class (cache line) having a shareability EX if exclusive or RO if shareable by all processors, which is indicated in the cache directory (PD) of each processor, characterized in that cache control circuits are provided, by which a new line brought into the cache of the requesting processor after a miss from a main store (MS) page not designated shareable has its shareability set to EX in case of store (SI) and operand fetch (EX FETCH) requests by the processor and that the new line has its shareability set to RO for all other fetch accesses (RO FETCH) by the processor.
Claim 2
Dependent Claim 74 words
Storage hierarchy according to claim 1, characterized in that after a cache miss due to any fetch request and where the requested line is present unchanged in a remote cache, the new line in the cache of the requesting processor and the remote line have their shareabilities both set to RO, irrespective of the original shareability of the remote line and that in case of a changed remote line, it is invalidated and castout.
Claim 3
Dependent Claim 31 words
Storage hierarchy according to claim 1 or 2, characterized in that the cache directories (PD) are addressed by the non-translatable part of the logical address and bits of the translatable part.
Claim 4
Dependent Claim 44 words
Storage hierarchy according to claim 3, characterized in that synonyms with shareability (RO) in the cache of the requesting processor are duplicated in that cache to be addressed by their synonyms and that synonyms with shareability EX are accessed directly using their original address.
Claim 5
Dependent Claim 94 words
Storage hierarchy according to one of the claims 1 to 4, characterized in that the multiprocessor system comprises several system controllers (SC), each serving several processors (IE) and holding copies (CD) of the cache directories (PD) of each associated processor, that the cache directories (PD) and their copies (CD) are addressed by the same address bits of the virtual address, that all system controllers (SC) in the multiprocessor system are interconnected (XI bus) and that the system controllers provide circuits to search for cache synonyms and remote cache conflicts in the copy directories (CD).
Claim 6
Dependent Claim 71 words
Storage hierarchy according to claim 5, characterized in that upon detection of a remote cache conflict the remote system controller issues commands (ARO) to its associated cache (BCC) to test for the change bit in the cache directory (PD) and that the remote system controller issues commands (ATRO) to the requesting system controller when the shareability of a new line has to be changed to RO for an exclusive fetch request.
Claim 7
Dependent Claim 41 words
Storage hierarchy, in particular according to one of the claims 3 to 6, characterized in that cache synonym detection is performed by addressing the cache directory (PD) with all. permutations of the bits in the translatable part of the cache address.

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