Patent EP0125646A1 successfully refreshed from Google Patents.
EP0125646A1
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EP
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A biasing circuit for multifunction bipolar integrated circuits
Assignee: Telecom Italia SpA
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Filing: 1984-05-10
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Granted: —
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Expires: 2004-05-10
Abstract
Abstract The bias circuit generates fixed and programmable currents starting from a voltage (V R ) depending on the band-gap reference. Programmable currents (Ip1....Ip4) are obtained by a single programmation resistor (Re) for all the functions, which resistor generates a low programmation current; after passing through a low-current PNP mirror, said programmation current is raised to the values required by the individual functions of the integrated circuit through a double amplification by means of two NPN current mirrors (Figure 2).
Inventors
- 👤 Valerio Giorgetta
- 👤 Vanni Poletto
- 👤 Mario Sartori
- 👤 Marco Siligoni
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 13:12
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/22
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
253 words
A bias circuit for multifunction integrated circuits, apt to generate fixed and programmable currents and the voltages required by the functions (Fl....F4) of the integrated circuit, characterized in that said fixed and programmable currents are obtained from a common reference voltage (V R ) generated inside the bias circuit and depending on the band-gap of the semiconductor by which the individual circuit elements are manufactured; in that for the generation of said fixed currents, said common reference voltage, raised to the level necessary to drive all the functions, is applied to the bases of a plurality of common-collector transistors (Q12....Q15) at whose emitters voltages are present to be applied to generators generating the fixed currents for the various functions (Fl....F4) of the integrated circuit; and in that, in order to obtain said programmable currents, a low-programmation current is generated through a programmation resistor (Re) external to the integrated circuit, and said current is raised to the level required by the individual functions of the integrated circuit to be biased through a double amplification, the first amplification being obtained through a floating NPN mirror (Q23, Q24, Q25, R12, R13) with base current compensation, and the second amplification being obtained through a multiple-output NPN mirror (Q26, Q27, Q28, Q29, Q30, Q31, R14, R15, R16, R17, R18, R19) whose input element is connected the output of that floating mirror (Q23, Q24, Q25, R12, R13) and whose output elements (Q28, R16; Q29, R17; Q30, R18; Q31, R19) are connected to the individual functions of the integrated circuit.
Claim 2
Dependent Claim
253 words
A bias circuit for multifunction integrated circuits, apt to generate fixed and programmable currents and the voltages required by the functions (Fl....F4) of the integrated circuit, characterized in that said fixed and programmable currents are obtained from a common reference voltage (V R ) generated inside the bias circuit and depending on the band-gap of the semiconductor by which the individual circuit elements are manufactured; in that for the generation of said fixed currents, said common reference voltage, raised to the level necessary to drive all the functions, is applied to the bases of a plurality of common-collector transistors (Q12....Q15) at whose emitters voltages are present to be applied to generators generating the fixed currents for the various functions (Fl....F4) of the integrated circuit; and in that, in order to obtain said programmable currents, a low-programmation current is generated through a programmation resistor (Re) external to the integrated circuit, and said current is raised to the level required by the individual functions of the integrated circuit to be biased through a double amplification, the first amplification being obtained through a floating NPN mirror (Q23, Q24, Q25, R12, R13) with base current compensation, and the second amplification being obtained through a multiple-output NPN mirror (Q26, Q27, Q28, Q29, Q30, Q31, R14, R15, R16, R17, R18, R19) whose input element is connected the output of that floating mirror (Q23, Q24, Q25, R12, R13) and whose output elements (Q28, R16; Q29, R17; Q30, R18; Q31, R19) are connected to the individual functions of the integrated circuit.
Claim 3
Dependent Claim
39 words
Bias circuit according to claim 1, characterized in that said programmation current, before being ampliiied, is made to pass into a base-current compensated PNP mirror (Q20, Q21, Q22, R10, Rll) for current decoupling occurring at a low current value.
Claim 4
Dependent Claim
36 words
Bias circuit according to claim 1 or 2, characterized in that said NPN current mirror with multiple output (Q26,...Q31, R15....R19) supplies different currents from its different output elements (Q28, R16; Q29, R17; Q30, R18; Q31, R19).
References Cited (Backward Citations)
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GB2080063A
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GB2096803A
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