Patent EP0125504A1 successfully refreshed from Google Patents.
EP0125504A1
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EP
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Bipolar transistor MOS transistor hybrid semiconductor integrated circuit device
Assignee: Hitachi Ltd
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Filing: 1984-04-13
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Granted: —
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Expires: 2004-04-13
Abstract
Abstract A high speed and low power consumption semiconductor integrated circuit device has a plurality of internal circuits (302, 303) each including circuit elements for performing a desired circuit operation, a plurality of input circuits (301) for receiving external input signals and supplying the signals to the internal circuits and a plurality of output circuits (301) for receiving the output signals from the internal circuits and supplying signals to an external. Each of the internal circuits is primarily constructed by bipolar transistors and MOS transistors, and at least one of each of the input circuits and each of the output circuits is primarily constructed by bipolar transistors.
Inventors
- 👤 Yoji Nishio
- 👤 Ikuro Masuda
- 👤 Kazuo Kato
- 👤 Shigeo Kuboki
- 👤 Masahiro Iwamura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 14:25
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90; H10D84/996
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
113 words
A semiconductor integrated circuit device comprising: a plurality of internal circuits (302, 303) each including circuit elements for performing a desired circuit operation; a plurality of input circuits (301) for receiving external input signals and supplying the received signals to said internal circuits; a plurality of output circuits (301) for receiving output signals from said internal circuits and externally supplying the output signals; said internal circuits, said input circuits and said'output circuits being formed in a common semiconductor substrate (300); said internal circuits primarily being constructed by bipolar transistors and MOS transistors; at least one of each of said input circuits and each of said output circuits primarily being constructed by bipolar transistors.
Claim 2
Dependent Claim
113 words
A semiconductor integrated circuit device comprising: a plurality of internal circuits (302, 303) each including circuit elements for performing a desired circuit operation; a plurality of input circuits (301) for receiving external input signals and supplying the received signals to said internal circuits; a plurality of output circuits (301) for receiving output signals from said internal circuits and externally supplying the output signals; said internal circuits, said input circuits and said'output circuits being formed in a common semiconductor substrate (300); said internal circuits primarily being constructed by bipolar transistors and MOS transistors; at least one of each of said input circuits and each of said output circuits primarily being constructed by bipolar transistors.
Claim 3
Dependent Claim
23 words
A semiconductor integrated circuit device according to Claim 1 wherein each of said internal circuits is constructed by at least one basic cell.
Claim 4
Dependent Claim
27 words
A semiconductor integrated circuit device according to Claim 2 wherein said basic cell is constructed by a plurality of bipolar transistors and a plurality of MOS transistors.
Claim 5
Dependent Claim
96 words
A semiconductor integrated circuit device comprising: a semiconductor substrate (304) having a plurality of basic cell lines (303) arranged in parallel on one main plane thereof, said basic cell lines each including a plurality of basic cells (302) each including at least one transistor; a wiring pattern (304) disposed on said semiconductor substrate with an insulating layer being interleaved therebetween for making connections in each of said basic cells and among said basic cells, at least one of said basic cell lines being constructed by a plurality of bipolar transistors and a plurality of MOS transistors.
Claim 6
Dependent Claim
96 words
A semiconductor integrated circuit device comprising: a semiconductor substrate (304) having a plurality of basic cell lines (303) arranged in parallel on one main plane thereof, said basic cell lines each including a plurality of basic cells (302) each including at least one transistor; a wiring pattern (304) disposed on said semiconductor substrate with an insulating layer being interleaved therebetween for making connections in each of said basic cells and among said basic cells, at least one of said basic cell lines being constructed by a plurality of bipolar transistors and a plurality of MOS transistors.
Claim 7
Dependent Claim
31 words
A semiconductor integrated circuit device according to Claim 4 wherein each of said basic cells is constructed by at least a plurality of bipolar transistors and a plurality of MOS transistors.
Claim 8
Dependent Claim
95 words
A semiconductor integrated circuit device according to Claim 5 wherein each of said basic cell includes a bipolar transistor having one main terminal thereof fixed to a highest potential in the semiconductor substrate and a MOS transistor in a common well formed in one main plane of the semiconductor substrate, a potential of said well being supplied from said one main terminal, a bipolar transistor having one main terminal thereof connected to a potential which varies during the operation, arranged in a different well from said well, and a MOS transistor arranged between said wells.
Claim 9
Dependent Claim
62 words
7 . A semiconductor integrated circuit device according to Claim 6 wherein the other main terminal of said bipolar transistor having said one main terminal thereof fixed to the highest potential in the semiconductor substrate and said one main terminal of said bipolar transistor connected to the potential which varies during the circuit operation are interconnected by a metalized low resistance wiring.
Claim 10
Dependent Claim
33 words
A semiconductor integrated circuit device according to Claim 5 wherein a plurality of contacts are formed on a first insulation layer on a drain or a source of at least one MOS transistor.
Claim 11
Dependent Claim
36 words
A semiconductor integrated circuit device according to Claim 5 wherein a wiring connected to a control terminal of the bipolar transistor is narrower than a wiring connected to the other main terminal of the bipolar transistor.
Claim 12
Dependent Claim
43 words
A semiconductor integrated circuit device according to Claim 5 wherein at least one space for constructing a logic circuit is formed on each side of a highest potential power supply wiring and a lowest potential power supply wiring running above the MOS transistor.
Claim 13
Dependent Claim
35 words
A semiconductor integrated circuit device according to Claim 4 wherein at least one of said basic cells includes a MOS basic cell constructed by MOS transistors and a bipolar basic cell constructed by bipolar transistors.
Claim 14
Dependent Claim
55 words
A semiconductor integrated circuit device according to Claim 11 wherein a plurality of said MOS basic cells are arranged to form a MOS array, at least one said bipolar basic cell is arranged to form a bipolar array, and at least one of said basic cell lines includes said MOS array and said bipolar array.
Claim 15
Dependent Claim
26 words
A semiconductor integrated circuit device according to Claim 11 wherein the basic cells at opposite ends of the basic cell line are the bipolar basic cells.
Claim 16
Dependent Claim
33 words
A semiconductor integrated circuit device according to Claim 12 wherein each MOS array includes an even number of MOS basic cells and each bipolar array includes an even number of bipolar basic cells.
Claim 17
Dependent Claim
20 words
A semiconductor integrated circuit device according to Claim 12 wherein each MOS array includes an even number of MOS transistors.
Claim 18
Dependent Claim
20 words
A semiconductor integrated circuit device according to Claim 12 wherein each bipolar array includes an even number of bipolar transistors.
Claim 19
Dependent Claim
58 words
A semiconductor integrated circuit device having a plurality of functional circuit blocks (2211 - 2214) each including at least one logic gate, formed on a main surface of a semiconductor substrate, characterized by that at least one of the logic gates of at least one of the functional circuit blocks is constructed by bipolar transistors and MOS transistors.
Claim 20
Dependent Claim
58 words
A semiconductor integrated circuit device having a plurality of functional circuit blocks (2211 - 2214) each including at least one logic gate, formed on a main surface of a semiconductor substrate, characterized by that at least one of the logic gates of at least one of the functional circuit blocks is constructed by bipolar transistors and MOS transistors.
Claim 21
Dependent Claim
22 words
A semiconductor integrated circuit device according to Claim 17 including a plurality of sub-chips each including a plurality of functional circuit blocks.
Claim 22
Dependent Claim
42 words
A semiconductor integrated circuit device according to Claim 17 wherein at least one of logic gates of one functional circuit block which forms an output to other functional logic block is constructed by a hybrid circuit of bipolar transistors and MOS transistors.
Claim 23
Dependent Claim
39 words
A semiconductor integrated circuit device according to Claim 18 wherein at least one of the logic gates of one sub-chip which forms an output to other sub-chip is constructed by a hybrid circuit of bipolar transistors and MOS transistors.
References Cited (Backward Citations)
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