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EP0093818A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Integrated monolithic circuit with integrated capacitors

Assignee: TDK Micronas GmbH
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Filing: 1982-05-07
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Granted: —
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Expires: 2002-05-07
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Abstract

Abstract The integrated capacitors are disposed in the parts of the surface which are usually unoccupied and are situated between the terminal pads (2...) among themselves and between the latter and adjacent circuit parts (3) and the edge of the substrate (1) of the integrated circuit in a manner such that they at least partially enclose a terminal pad (2...). In an MOS integrated circuit having a substrate bias generator circuit (17), one of the capacitors is situated between the leads (14, 15) for the operating voltage and the circuit zero point and one between the leads (16, 15) for the substrate terminal and the circuit zero point. <IMAGE>

Inventors

  • 👤 Ljubomir Dipl.-Ing. Micic
  • 👤 Daniel Dr. Mlynek
  • 👤 Reiner Dipl.-Ing. Backes
  • 👤 Friedrich Ing. Grad. Schmidtpott

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 03:19
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; H10D; H10D1/00; H10D1/60; H10D1/62; H10D1/66; H10D84/00; H10D84/201; H10D84/204; H10D84/212; H10D89/00; H10D89/10; H10D89/211; H10D89/213; H10D89/215; H10W70/00; H10W70/60; H10W72/931; H10W72/932; H10W72/951; H10W72/952

Claims Analysis

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References Cited (Backward Citations)

US3460050A Cited
US3689803A Cited
FR2249446A1 Cited
EP0048474A1 Cited

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