A PCM signal processor

Claim 1

A PCM signal processor for decoding PCM signals, and correcting their errors, from a TV format signal whose horizontal period includes a data block comprising plural data words, an error correction check word and an error detection check word, individually interleaved by given blocks with each other, the said processor comprising; means for demodulating the said data block from a TV format signal input to it; , means for converting the said data block to parallel signals sharing each word of the individual data words, the error correction check word and the error detection check word; means for de-interleaving the said parallel signals, except the said error detection check word, by said given blocks with each other; means for outputting the said parallel data words; means for correcting errors in the said data words; means for generating a syndrome word by combining the said parallel de-interleaved words, and applying the said syndrome word to the said error correcting means so that error correction is carried out by combining the said syndrome word with the said individual errors in the said words; means for detecting a block error of the said data olock by checking said parallelly converted data words and error correction check word with said error detection check word; means for delaying error pointers output from the said block error detecting means so as to output differently delayed plural error pointers, the respective error pointers corresponding as regards their delay amounts with respective ones of the said de-interleaved data words and error correction check word; means for detecting an error pointer pattern of individual ones of the said de-interleaved data words and error correction check word using the said error pointers supplied from the said error pointer delaying means; and means for controlling the said error correcting operation of the said error correcting means using output signals supplied from the said error pointer pattern detecting means .