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JPS5658115A Expired / Lapsed JP ⏱️ 0.0 years remaining

Digital-analog converter

Assignee: Toshiba Corp
•
Filing: 1979-10-13
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Granted: —
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Expires: 1999-10-13
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Abstract

Abstract PURPOSE:To avoid the lead-out of the anomalous signal out of the converted analog signal, which is caused when a D/A conversion is given along with a data correction and by the fact that the data of different type mixes up at the moment when the reproduced data is switched from several record systems. CONSTITUTION:The correction ward Q1 is eliminated out of the interleaved sampling signal words A1-B3 plus the correction words P1 and Q1 and then supplied to the delaying circuits 33a-33g within the deinterleave circuit 33. At the same time, the area of correction is designated out of each word via the error detecting circuit 31, and this designated data is supplied to the circuits 33a-33g. And the designated data Ep given from the circuit 31 is sent to the correction data detecting circuit 45 along with the output data given from the delaying circuit. The circuit 45 sends its output in the form of the instruction of correction to the correction circuit 34 as well as to the muting circuit 44 in the form of the muting command respectively.

Inventors

  • 👤 Tadashi Kojima

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 22:57
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1809

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS53141009A Cited

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