Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
189 words
In a push-pull inverter circuit connected to an unidirectional voltage input and being operable to provide an alternating voltage output, the inverter circuit comprising a main transformer in circuit with two alternately conducting transistor switching means, each having a base, an emitter and a collector, the improvement which comprises: separate saturable inductor means that are non-coupled for each said transistor switching means and being connected directly across the base-emitter junction thereof; and diode means connected in parallel with each said saturable inductor means; whereby voltage on the base of each said transistor switching means for a predetermined time period serves to saturate the respective saturable inductor means associated therewith; each said saturable inductor means being operable, when saturated, to terminate the flow of base current for its associated transistor switching means and to provide a path for rapid evacuation of charge carriers stored in the base-emitter junction of said associated transistor switching means to render the latter rapidly non-conductive; each said diode means serving to provide a drain path for current continuing to flow through its associated saturable inductor means upon said evacuation of charge carriers by the latter.
Claim 2
Dependent Claim
189 words
In a push-pull inverter circuit connected to an unidirectional voltage input and being operable to provide an alternating voltage output, the inverter circuit comprising a main transformer in circuit with two alternately conducting transistor switching means, each having a base, an emitter and a collector, the improvement which comprises: separate saturable inductor means that are non-coupled for each said transistor switching means and being connected directly across the base-emitter junction thereof; and diode means connected in parallel with each said saturable inductor means; whereby voltage on the base of each said transistor switching means for a predetermined time period serves to saturate the respective saturable inductor means associated therewith; each said saturable inductor means being operable, when saturated, to terminate the flow of base current for its associated transistor switching means and to provide a path for rapid evacuation of charge carriers stored in the base-emitter junction of said associated transistor switching means to render the latter rapidly non-conductive; each said diode means serving to provide a drain path for current continuing to flow through its associated saturable inductor means upon said evacuation of charge carriers by the latter.
Claim 3
Dependent Claim
38 words
The inverter circuit of claim 1, and positive feedback means comprising a current transformer for said transistor switching means and being operable to provide base drive current for said transistor switching means proportional to the collector current thereof.
Claim 4
Dependent Claim
47 words
The inverter circuit of claim 1, and voltage feedback means for said transistor switching means, said voltage feedback means comprising a delay means operable to prevent conduction of said transistor switching means prior to the reduction of the collector voltage thereof to the minimum collector voltage level.
Claim 5
Dependent Claim
17 words
The inverter circuit of claim 3, wherein said delay means comprises a saturable inductor and a capacitor.
Claim 6
Dependent Claim
37 words
The inverter circuit of claim 1, wherein each of said saturable inductor means is combined with a current feedback means for providing base drive current for an associated transistor switching means proportional to the collector current thereof.
Claim 7
Dependent Claim
72 words
The inverter circuit of claim 1, and positive current feedback means comprising a saturable transformer means for each transistor switching means, each said feedback means being operable to provide base drive current for its associated transistor switching means proportional to the collector current thereof, and resetting means for said saturable transformer means, .[.and.]. .Iadd.said .Iaddend.resetting means being operable to provide therefor periodic reset voltage derived from the voltage of the main transformer.
Claim 8
Dependent Claim
20 words
The inverter circuit of claim 1, wherein said transistor switching means are connected in series across the unidirectional voltage input.
Claim 9
Dependent Claim
34 words
The inverter circuit of claim 2, and a capacitor connected directly between the collectors of said transistor switching means, said capacitor being operable to restrain the rate of change of voltage on the collectors.
Claim 10
Dependent Claim
43 words
The inverter circuit of claim 2, and triggering means for initiating alternate conduction of said transistor switching means, the main transformer being operable periodically to supply from its leakage inductance stored inductive energy to said transistor switching means to sustain alternate conduction thereof.
Claim 11
Dependent Claim
51 words
The inverter circuit of claim 9, and a capacitor connected directly between the collectors of said transistor switching means, said capacitor being operable to restrain the rate of change of voltage on the collectors and to provide a path for main transformer inductive current upon turn-off of said transistor switching means.
Claim 12
Dependent Claim
326 words
In a push-pull inverter circuit connected to a unidirectional voltage input and being operable to provide an alternating voltage output, the inverter circuit comprising a main transformer in circuit with two alternately conducting transistor switching means, each having a base; an emitter and a collector, the improvement which comprises: separate saturable inductor means that are non-coupled for each said transistor switching means and being connected directly across the base-emitter junction thereof; diode means connected in parallel with each said saturable inductor means; positive feedback means comprising a current transformer means connected to said transistor switching means; a capacitor connected directly between the collectors of said transistor switching means; and triggering means in circuit with the unidirectional voltage input and said transistor switching means for initiating alternate conduction thereof, the main transformer being operable periodically to supply from its leakage inductance stored inductive energy to said transistor switching means in order to sustain alternate conduction thereof; whereby voltage on the base of each said transistor switching means for a predetermined time period serves to saturate the respective saturable inductor means associated therewith; each said saturable inductor means being operable, when saturated, to terminate the flow of base current for its associated transistor switching means and to provide a low resistance path for rapid evacuation of charge carriers stored in the base-emitter junction of said associated transistor switching means to render the latter rapidly non-conductive; said positive feedback means being operable to provide base drive current for said transistor switching means proportional to the collector current thereof whereby to prevent premature application of base drive current; each said diode means serving to provide a drain path for current continuing to flow through its associated saturable inductor means upon evacuation of charge carriers by the latter; said capacitor being operable to restrain the rate of change of voltage on the collectors and to provide a path for main transformer inductive current upon turn-off of said transistor switching means. .Iadd.
Claim 13
Dependent Claim
326 words
In a push-pull inverter circuit connected to a unidirectional voltage input and being operable to provide an alternating voltage output, the inverter circuit comprising a main transformer in circuit with two alternately conducting transistor switching means, each having a base; an emitter and a collector, the improvement which comprises: separate saturable inductor means that are non-coupled for each said transistor switching means and being connected directly across the base-emitter junction thereof; diode means connected in parallel with each said saturable inductor means; positive feedback means comprising a current transformer means connected to said transistor switching means; a capacitor connected directly between the collectors of said transistor switching means; and triggering means in circuit with the unidirectional voltage input and said transistor switching means for initiating alternate conduction thereof, the main transformer being operable periodically to supply from its leakage inductance stored inductive energy to said transistor switching means in order to sustain alternate conduction thereof; whereby voltage on the base of each said transistor switching means for a predetermined time period serves to saturate the respective saturable inductor means associated therewith; each said saturable inductor means being operable, when saturated, to terminate the flow of base current for its associated transistor switching means and to provide a low resistance path for rapid evacuation of charge carriers stored in the base-emitter junction of said associated transistor switching means to render the latter rapidly non-conductive; said positive feedback means being operable to provide base drive current for said transistor switching means proportional to the collector current thereof whereby to prevent premature application of base drive current; each said diode means serving to provide a drain path for current continuing to flow through its associated saturable inductor means upon evacuation of charge carriers by the latter; said capacitor being operable to restrain the rate of change of voltage on the collectors and to provide a path for main transformer inductive current upon turn-off of said transistor switching means. .Iadd.
Claim 14
Dependent Claim
231 words
In a push-pull inverter circuit connected to a unidirectional voltage input and being operable to provide an alternating voltage output, the inverter circuit comprising two alternately conducting transistor switching means, each having a base, an emitter and a collector, the improvement which comprises: separate saturable inductor means that are non-coupled to each other for each said transistor switching means and being connected in circuit with the base-emitter junction thereof; whereby voltage on the base of each said transistor switching means for a predetermined time period serves to saturate the respective saturable inductor means associated therewith; each said saturable inductor means being operable, when saturated, to terminate the flow of base current for its associated transistor switching means and to provide a path for rapid evacuation of charge carriers stored in the base-emitter junction of said associated transistor switching means to render the latter rapidly non-conductive. .Iaddend. .Iadd.13. The inverter circuit of claim 12, and positive feedback means comprising a current transformer for said transistor switching means and being operable to provide base drive current for said transistor switching means proportional to the collector current thereof. .Iaddend. .Iadd.14. The inverter of claim 12, and voltage feedback means for said transistor switching means, said voltage feedback means comprising a delay means operable to prevent conduction of said transistor switching means prior to the reduction of the collector voltage thereof to the minimum collector
Claim 15
Dependent Claim
210 words
voltage level. .Iaddend. .Iadd.15. The inverter circuit of claim 14 wherein said delay means comprises a saturable inductor. .Iaddend. .Iadd.16. The inverter circuit of claim 12 and diode means connected across the base-emitter junction of each said transistor switching means, each said diode means serving to provide a drain path for current continuing to flow through its associated saturable inductor means upon said evacuation of charge carriers by the latter. .Iaddend. .Iadd.17. The inverter circuit of claim 12 wherein the inverter circuit comprises a main transformer in circuit with said transistor switching means, the main transformer comprising a leakage inductance for storing inductive energy and being operable periodically to supply inductive energy stored in its leakage inductance to said transistor switching means, and a capacitor connected between the collectors of said transistor switching means, said capacitor being operable to restrain the rate of change of voltage on said collectors and to provide a path for the current caused by said inductive energy upon turn-off of said transistor switching means. .Iaddend. .Iadd.18. The inverter circuit of claim 12 and means for providing forward feedback for said transistor means proportional to the collector current thereof and means for providing reverse feedback for said transistor means proportional to the collector voltage thereof. .Iaddend.