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USRE30764E Expired / Lapsed US ⏱️ 0.0 years remaining

Electrical output peak detecting apparatus

Assignee: Applied Biosystems Inc
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Filing: 1979-12-20
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Granted: 1981-10-06
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Expires: 1999-12-20
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Abstract

Abstract Anticipation signals are derived for each peak whenever a differential exists within a closed loop having the electrical output connected to the input thereof and a confirmation signal is derived after each peak at a threshold level of the new slope polarity exceeding the noise level of the electrical output. The amplitude of each peak is stored as a voltage level which follows the electrical output throughout either slope polarity until a peak is reached and this voltage level is continuously compared with the electrical output to derive the slope polarity thresholds. Otherwise, a very particular embodiment is disclosed with which the stored voltage level only relates to either the most significant maximum or minimum peak of the electrical output and the disclosed embodiments are related to instruments which perform spectral analysis.

Inventors

  • 👤 Andrew R. Muir
  • 👤 Joseph A. Vergato

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 15:57
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/04; H; H03; H03K; H03K5/00; H03K5/153; H03K5/1532; G06; G06F; G06F2218/00; G06F2218/08; G06F2218/10

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 115 words
Circuitry for generating an anticipation signal and a confirmation signal relative to peak amplitudes of a varying electrical output, comprising: sample and hold means for storing a voltage level; means for differentially comparing the electrical output with said voltage level; switching means for polarizing and connecting the output of said comparator means to the input of said sample and hold means; means for deriving the anticipation signal when a differential exists between said voltage level and the .[.electrical output.]. .Iadd.output of said comparator.Iaddend.; and logic means for controlling said polarized switching means in accordance with slope polarity thresholds of the electrical output relative to said voltage level and deriving the confirmation signal at said thresholds.
Claim 2
Dependent Claim 115 words
Circuitry for generating an anticipation signal and a confirmation signal relative to peak amplitudes of a varying electrical output, comprising: sample and hold means for storing a voltage level; means for differentially comparing the electrical output with said voltage level; switching means for polarizing and connecting the output of said comparator means to the input of said sample and hold means; means for deriving the anticipation signal when a differential exists between said voltage level and the .[.electrical output.]. .Iadd.output of said comparator.Iaddend.; and logic means for controlling said polarized switching means in accordance with slope polarity thresholds of the electrical output relative to said voltage level and deriving the confirmation signal at said thresholds.
Claim 3
Dependent Claim 43 words
The circuitry of claim 1 wherein said sample and hold means includes an operational amplifier having inverting and noninverting inputs and an output, said output thereof being shunted to said inverting input thereof and said noninverting input thereof being grounded through a capacitor.
Claim 4
Dependent Claim 47 words
The circuitry of claim 1 wherein said comparator means includes an operational amplifier having inverting and noninverting inputs and an output, said noninverting input thereof being connected to the electrical output and said inverting input thereof being connected to the output of said sample and hold means.
Claim 5
Dependent Claim 102 words
The circuitry of claim 1 wherein said polarized switching means includes first and second diodes separately connected in series respectively with first and second FET switches between the output of said comparator means and the input of said sample and hold means with the cathode of said first diode and the anode of said second diode being connected to that input; the gate of said first FET switch being connected to a positive slope polarity threshold from said control logic means and the gate of said second FET switch being connected to a negative slope polarity threshold from said control logic means.
Claim 6
Dependent Claim 51 words
The circuitry of claim 1 wherein said anticipation signal means includes an operational amplifier having inverting and noninverting inputs and an output, said noninverting input thereof being connected to the output of said comparator means and said inverting input thereof being connected to the output of said sample and hold means.
Claim 7
Dependent Claim 143 words
The circuitry of claim 1 wherein said control logic means includes first and second operational amplifiers and a bistable flip-flop having preset and clear inputs and complementary outputs, said first operational amplifier having inverting and noninverting inputs and an output, said noninverting input thereof being connected to a positive voltage reference and to said voltage level while said inverting input thereof is connected to the electrical output, said second operational amplifier having inverting and noninverting inputs and an output, said noninverting input thereof being connected to the electrical output while said inverting input thereof is connected to a negative voltage reference and to said voltage level, said preset input being connected to the output of said first operational amplifier and said clear input being connected to the output of said second operational amplifier, said complementary outputs being connected to said polarized switching means.
Claim 8
Dependent Claim 99 words
Circuitry for deriving the amplitude of the most significant peak relative to a varying electrical output, comprising; sample and hold means for storing a voltage level; means for differentially comparing the electrical output with said voltage level; switching means for polarizing and connecting the output of said comparator means to the input of said sample and hold means; and means for controlling said polarized switching means so that only positive inputs are connected to said sample and hold means when the most significant maximum peak is desired and only negative inputs when the most significant minimum peak is desired.
Claim 9
Dependent Claim 99 words
Circuitry for deriving the amplitude of the most significant peak relative to a varying electrical output, comprising; sample and hold means for storing a voltage level; means for differentially comparing the electrical output with said voltage level; switching means for polarizing and connecting the output of said comparator means to the input of said sample and hold means; and means for controlling said polarized switching means so that only positive inputs are connected to said sample and hold means when the most significant maximum peak is desired and only negative inputs when the most significant minimum peak is desired.
Claim 10
Dependent Claim 437 words
In an analytical instrument having an electrical output, the improvement comprising: sample and hold means including a first operational amplifier with inverting and noninverting inputs and an output, said output thereof being shunted to said inverting input thereof and said noninverting input thereof being grounded through a capacitor; a first comparator including a second operational amplifier with inverting and noninverting inputs and an output, said noninverting input thereof being connected to the electrical output and said inverting input thereof being connected to the output of said sample and hold means; a second comparator including a third operational amplifier with inverting and noninverting inputs and an output, said noninverting input thereof being connected to the output of said first comparator and said inverting input thereof being connected to the output of said sample and hold means; a positive threshold comparator including a fourth operational amplifier with inverting and noninverting inputs and an output, said noninverting input thereof being connected to a positive voltage reference and to the output of said sample and hold means, while said inverting input thereof is connected to the electrical output; a negative threshold comparator including a fifth operational amplifier with inverting and noninverting inputs and an output, said noninverting input thereof being connected to the electrical output, while said inverting input thereof is connected to a negative voltage reference and to the output of said sample and hold means; a bistable flip-flop having preset and clear inputs and complementary outputs, said preset input being connected to the output of said positive threshold comparator and said clear input being connected to the output of said negative threshold comparator; a first diode series connected with a first FET switch between the output of said first comparator and the input to said sample and hold means with the cathode of said first diode being connected to that input and the gate of said first FET switch being connected to the output from said flip flop; and a second diode series connected with a second FET switch between the output of said first comparator and the input to said sample and hold means with the anode of said second diode being connected to that input and the gate of said second FET switch being connected to the complementary output from said flip-flop; whereby peak anticipation signals are derived at the output of said second comparator when a differential exists between the electrical output and the output of said sample and hold means, while peak confirmation signals are derived at the complementary output of said flip-flop when positive and negative levels respectively of said threshold comparator are reached.
Claim 11
Dependent Claim 437 words
In an analytical instrument having an electrical output, the improvement comprising: sample and hold means including a first operational amplifier with inverting and noninverting inputs and an output, said output thereof being shunted to said inverting input thereof and said noninverting input thereof being grounded through a capacitor; a first comparator including a second operational amplifier with inverting and noninverting inputs and an output, said noninverting input thereof being connected to the electrical output and said inverting input thereof being connected to the output of said sample and hold means; a second comparator including a third operational amplifier with inverting and noninverting inputs and an output, said noninverting input thereof being connected to the output of said first comparator and said inverting input thereof being connected to the output of said sample and hold means; a positive threshold comparator including a fourth operational amplifier with inverting and noninverting inputs and an output, said noninverting input thereof being connected to a positive voltage reference and to the output of said sample and hold means, while said inverting input thereof is connected to the electrical output; a negative threshold comparator including a fifth operational amplifier with inverting and noninverting inputs and an output, said noninverting input thereof being connected to the electrical output, while said inverting input thereof is connected to a negative voltage reference and to the output of said sample and hold means; a bistable flip-flop having preset and clear inputs and complementary outputs, said preset input being connected to the output of said positive threshold comparator and said clear input being connected to the output of said negative threshold comparator; a first diode series connected with a first FET switch between the output of said first comparator and the input to said sample and hold means with the cathode of said first diode being connected to that input and the gate of said first FET switch being connected to the output from said flip flop; and a second diode series connected with a second FET switch between the output of said first comparator and the input to said sample and hold means with the anode of said second diode being connected to that input and the gate of said second FET switch being connected to the complementary output from said flip-flop; whereby peak anticipation signals are derived at the output of said second comparator when a differential exists between the electrical output and the output of said sample and hold means, while peak confirmation signals are derived at the complementary output of said flip-flop when positive and negative levels respectively of said threshold comparator are reached.
Claim 12
Dependent Claim 112 words
The combination of claim 8 wherein the analytical instrument is a spectrometer including a microcomputer through which the radiation frequency spectrum of the spectrometer is controlled and a printer to record information from said computer; and wherein said peak anticipation and confirmation signals are connected to said computer along with the output of said sample and hold means which is connected through an analog/digital converter, each said peak anticipation signal causing storage of said sample and hold means output and the radiation frequency in said computer while each said peak confirmation signal causes said computer to pass the most recent sample and hold means output and radiation frequency information to said printer.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-10-05 1985-04-06 1985-10-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-10-05 1989-04-06 1989-10-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-10-05 1993-04-06 1993-10-06 $7700.00 Window Closed / Lapsed

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