USRE28500E
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low noise field effect transistor with channel having subsurface portion of high conductivity
Assignee: —
•
Filing: 1973-12-19
•
Granted: 1975-07-29
•
Expires: 1993-12-19
Abstract
Abstract A PN junction gated field effect transistor is described in which the channel region is provided with a subsurface portion of higher conductivity than the outer surface of such channel at an intermediate position between the outer surface and the bottom of the channel in order to reduce the noise caused by surface recombination of current carriers and other surface effects, to about one-tenth its previous noise level. This subsurface portion of high conductivity is preferably formed by providing an oxide layer which, during diffusion of the channel, gathers the doping impurity from the surface of the channel to reduce the conductivity of such surface. A further method is to diffuse compensating impurities into the channel which invert the channel surface to an intrinsic material while leaving a subsurface portion of high conductivity.
Inventors
No inventors recorded.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 22:26
CPC Classifications
H; H10; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/141; H10D; H10D99/00; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
154 words
In a field effect semiconductor device having a substrate of one conductivity type including source and drain regions of the other conductivity type and a channel portion of the other conductivity type extending between the source and drain regions with a gate electrode disposed thereon, the improvement comprising: said channel portion having an outer surface on one side of said substrate, a bottom portion, and a subsurface portion of higher electrical conductivity relative to and spaced below said outer surface of said channel at an intermediate position between said outer surface and (the ) said bottom portion of said channel for reducing the noise in the output signal of said device, said subsurface portion having a doping impurity concentration which is several times greater than that of said outer surface and said bottom portion of said channel, said outer surface, said bottom portion, and said subsurface portion being of the same conductivity type) .
Claim 2
Dependent Claim
154 words
In a field effect semiconductor device having a substrate of one conductivity type including source and drain regions of the other conductivity type and a channel portion of the other conductivity type extending between the source and drain regions with a gate electrode disposed thereon, the improvement comprising: said channel portion having an outer surface on one side of said substrate, a bottom portion, and a subsurface portion of higher electrical conductivity relative to and spaced below said outer surface of said channel at an intermediate position between said outer surface and (the ) said bottom portion of said channel for reducing the noise in the output signal of said device, said subsurface portion having a doping impurity concentration which is several times greater than that of said outer surface and said bottom portion of said channel, said outer surface, said bottom portion, and said subsurface portion being of the same conductivity type) .
Claim 3
Dependent Claim
40 words
A semiconductor device in accordance with claim 1 which is a PN junction gated field effect transistor having at least one gate region of opposite type conductivity to said channel region forming a PN junction gate with said channel region.
Claim 4
Dependent Claim
59 words
A field effect transistor in accordance with claim 2 in which the channel region has a doping impurity concentration which increases from an intermediate value at the outer surface of the channel to a peak value in said subsurface portion of highest conductivity and decreases from said peak value to a minimum value at the bottom of said channel.
Claim 5
Dependent Claim
25 words
A field effect transistor in accordance with claim 3 in which said peak value is at least 0.5 microns below the surface of said channel.
Claim 6
Dependent Claim
33 words
A field effect transistor in accordance with claim 3 in which the surface impurity concentration of the channel is less than that of the source, drain or top gate regions of the transistor.
Claim 7
Dependent Claim
41 words
A field effect transistor in accordance with claim 2 in which the channel region contains a diffused doping impurity, a portion of which has been removed from the surface of said channel region to leave said subsurface portion of highest conductivity.
Claim 8
Dependent Claim
17 words
A field effect transistor in accordance with claim 5 in which the channel doping impurity is boron.
Claim 9
Dependent Claim
33 words
A field effect transistor in accordance with claim 2 in which the channel region includes an outer epitaxial layer of low conductivity over a diffused layer containing the subsurface portion of highest conductivity.
Claim 10
Dependent Claim
34 words
A field effect transistor in accordance with claim 2 in which the channel region has an outer surface layer of compensated intrinsic semiconductor material containing donor and acceptor doping impurities, over said subsurface portion.
Claim 11
Dependent Claim
24 words
A field effect transistor in accordance with claim 2 in which the subsurface portion of highest conductivity is provided by ion implanted doping impurities.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-07-28 | 1979-01-27 | 1979-07-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-07-28 | 1983-01-27 | 1983-07-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-07-28 | 1987-01-27 | 1987-07-29 | $7700.00 | Window Closed / Lapsed |