Transistor using an isovalent semiconductor oxide as the active channel layer

Claim 2

A semiconductor device, comprising: a drain electrode; a source electrode; means for a channel to electrically couple the drain electrode and the source electrode, the means comprising an isovalent semiconductor film including indium gallium oxide; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel.

Claim 3

A display device, comprising: a plurality of display elements configured to operate collectively to display images, where each of the display elements includes a semiconductor device configured to control light emitted by the display element, the semiconductor device including: a drain electrode; a source electrode; an isovalent semiconductor channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide comprising a combination of isovalent cations selected from within the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel and configured to permit application of an electric field to the channel.

Claim 4

A display device, comprising: a plurality of display elements configured to operate collectively to display images, where each of the display elements includes a semiconductor device configured to control light emitted by the display element, the semiconductor device including: a drain electrode; a source electrode; an isovalent semiconductor channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide comprising a combination of isovalent cations selected from within the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel and configured to permit application of an electric field to the channel.

Claim 5

A semiconductor device, comprising: a drain electrode; a source electrode; a channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide comprising a combination of isovalent cations selected from within the D block and the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel; wherein the combination comprises indium gallium oxide and wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) of greater than about 0.5.

Claim 6

A semiconductor device, comprising: a drain electrode; a source electrode; a channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide comprising a combination of isovalent cations selected from within the D block and the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel; wherein the combination comprises indium gallium oxide and wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) of greater than about 0.5.

Claim 7

A semiconductor device, comprising: a drain electrode; a source electrode; a channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide comprising a combination of isovalent cations selected from within the D block and the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel; wherein the combination is selected from a group consisting of: tin titanium oxide; tin germanium oxide; and tin titanium germanium oxide.

Claim 8

A semiconductor device, comprising: a drain electrode; a source electrode; a channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide comprising a combination of isovalent cations selected from within the D block and the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel; wherein the combination is selected from a group consisting of: tin titanium oxide; tin germanium oxide; and tin titanium germanium oxide.

Claim 9

A semiconductor device, comprising: a drain electrode; a source electrode; a channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide comprising a combination of isovalent cahions selected from within the D block and the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel, wherein the combination comprises tin oxide and a second 4 + cation selected from within the D block and the P block of the Periodic Table.

Claim 10

A semiconductor device, comprising: a drain electrode; a source electrode; a channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide comprising a combination of isovalent cahions selected from within the D block and the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel, wherein the combination comprises tin oxide and a second 4 + cation selected from within the D block and the P block of the Periodic Table.

Claim 11

The semiconductor device of claim 5 , wherein the combination is selected from a group consisting of: tin titanium oxide; tin germanium oxide; and tin titanium germanium oxide.

Claim 12

A semiconductor device, comprising: a drain electrode; a source electrode; an isovalent semiconductor channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide-comprising a combination of isovalent cations selected from within the D block and the P block of the Periodic Table and wherein the combination comprises indium gallium oxide; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel.

Claim 13

A semiconductor device, comprising: a drain electrode; a source electrode; an isovalent semiconductor channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide-comprising a combination of isovalent cations selected from within the D block and the P block of the Periodic Table and wherein the combination comprises indium gallium oxide; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel.

Claim 14

The semiconductor device of claim 7 , wherein the channel has a peak incremental channel mobility of at least about 40 cm 2 /V s with a turn-on voltage greater than or equal to about −15 volts.

Claim 15

The semiconductor device of claim 7 , wherein the channel has a peak incremental channel mobility of at least about 2 cm 2 /V s and a turn-on voltage of between about −5 volts and +5 volts.

Claim 16

The semiconductor device of claim 7 , wherein the indium gallium oxide is sputter deposited.

Claim 17

The semiconductor device of claim 7 , wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) of greater than about 0.5.

Claim 18

The semiconductor device of claim 7 , wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) in a range of about 0.1 to about 0.5.

Claim 19

The semiconductor device of claim 7 , wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) of about 0.9.

Claim 20

The semiconductor device of claim 7 , wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) in a range of about 0.25 to about 0.35.

Claim 21

The semiconductor device of claim 7 , wherein the indium gallium oxide has an atomic ratio of In(In+Ga) in a range of about 0.05 to about 0.95.

Claim 22

A semiconductor device, comprising: a drain electrode; a source electrode; an isovalent semiconductor channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide-comprising a combination of isovalent cations selected from within the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel.

Claim 23

A semiconductor device, comprising: a drain electrode; a source electrode; an isovalent semiconductor channel contacting the drain electrode and the source electrode, wherein the channel includes an oxide-comprising a combination of isovalent cations selected from within the P block of the Periodic Table; a gate electrode; and a gate dielectric positioned between the gate electrode and the channel.

Claim 24

The semiconductor device of claim 16 , wherein the channel includes one of an amorphous form, a single-phase crystalline form, and a mixed- phase crystalline form.

Claim 25

The semiconductor device of claim 16 , wherein at least one of the drain electrode, the source electrode, the channel, the gate electrode, and the gate dielectric are substantially transparent.

Claim 26

The semiconductor device of claim 16 , wherein the channel is substantially transparent.

Claim 27

The semiconductor device of claim 16 , wherein the combination comprises tin oxide and a second 4 + cation selected from within the D block and the P block of the Periodic Table.

Claim 28

The semiconductor device of claim 16 , wherein the combination is selected from a group consisting of: tin titanium oxide; tin germanium oxide; and tin titanium germanium oxide.

Claim 29

The semiconductor device of claim 16 , wherein the combination comprises indium gallium oxide.

Claim 30

The semiconductor device of claim 22 , wherein the channel has a peak incremental channel mobility of at least about 40 cm 2 /V s with a turn-on voltage greater than or equal to about −15 volts.

Claim 31

The semiconductor device of claim 22 , wherein the channel has a peak incremental channel mobility of at least about 2 cm 2 /V s and a turn-on voltage of between about −5 volts and +5 volts.

Claim 32

The semiconductor device of claim 22 , wherein the indium gallium oxide is sputter deposited.

Claim 33

The semiconductor device of claim 22 , wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) of greater than about 0.5.

Claim 34

The semiconductor device of claim 22 , wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) in a range of about 0.1 to about 0.5.

Claim 35

The semiconductor device of claim 22 , wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) of about 0.9.

Claim 36

The semiconductor device of claim 22 , wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) in a range of about 0.25to about 0.35.

Claim 37

The semiconductor device of claim 22 , wherein the indium gallium oxide has an atomic ratio of In/(In+Ga) in a range of about 0.05 to about 0.95.