Bias circuit for BJT amplifier

Claim 1

A radio frequency (RF) amplifier circuit having an input terminal for receiving a RF input signal, comprising: a RF power-amplifying transistor having a base coupled to the input terminal; a bias circuit coupled to the input terminal and to the RF power-amplifying transistor, the bias circuit including a bypass capacitor and a PN junction diode having first and second terminals, the first terminal being coupled to the base of the RF amplifying transistor through at least one impedance element, the second terminal is coupled to a RF ground in the RF amplifier circuit through the bypass capacitor wherein the bias circuit is configured to raise a voltage at the base of the RF power-amplifying transistor in response to an increase in an RF power level in the RF input signal; and the PN junction diode is part of a detecting transistor having a base and a collector, the RF amplifier circuit further comprising: a reference voltage terminal for connecting to a reference voltage supply; a bias voltage terminal for connecting to a bias voltage supply; a first bias transistor having a collector coupled to the reference voltage supply through a reference resistor, an emitter coupled to a circuit ground terminal through a first emitter degeneration resistor, and a base; and a second bias transistor coupled with the detecting transistor in a current mirror configuration, the second bias transistor having a base connected to the base of the detecting transistor at a common connected base node, an emitter coupled to the base of the first bias transistor through a second emitter degeneration resistor, and a collector coupled to the bias voltage terminal.