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US7113203B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Method and system for single-chip camera

Assignee: Photonic Imaging Solutions Inc
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Filing: 2002-05-07
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Granted: 2006-09-26
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Expires: 2022-05-07
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Abstract

Abstract Method and system for a single-chip camera where an image sensor is a single-chip digital color imaging device that incorporates a sensor array that captures still or full-motion video and converts the images to digital data. Moreover, the image sensor employs a built-in correlated double sampler, an internal analog-to-digital converter, and a timing circuitry. Output from the sensor is an 8-bit or more raw data, horizontal sync signals, and vertical sync signals. The output raw data may then be fed into a compression circuit that generates packets of compressed output data. The compressed data is transmitted with a USB transceiver using isochronous packets. The packets are then received, decompressed, and color processed by a host PC.

Inventors

  • 👤 Ben S. Wu
  • 👤 James Cape
  • 👤 Shang-Hung Lin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 14:38
CPC Classifications
H; H04; H04N; H04N17/00; H04N17/002

Claims Analysis

Total Claims: 40
Claim 1
Independent Claim 174 words
A single-chip integrated circuit camera system, comprising: an image sensor; one or more external optical elements for focusing light onto the surface of the image sensor; an image-processing element for receiving raw image data and timing signals from the image sensor; a data storage element for storing image data produced by the image-processing element; a communication interface element for controlling input and output data and control signals for the camera; an on-chip multiplexer; a register set; and a test access element for verifying camera internal functionality, said test access element comprises one or more IO pins, wherein the one or more IO pins is either connected to the register set for controlling external functions or connected to internal data inputs and outputs for testing purpose, wherein the connection of the one or more IO pins is controlled by the on-chip multiplexer, wherein said image sensor, said image-processing element, said data storage element, said communication interface, said on-chip multiplexer, said register set and said test access element are on said single chip integrated circuit camera.
Claim 2
Dependent Claim 174 words
A single-chip integrated circuit camera system, comprising: an image sensor; one or more external optical elements for focusing light onto the surface of the image sensor; an image-processing element for receiving raw image data and timing signals from the image sensor; a data storage element for storing image data produced by the image-processing element; a communication interface element for controlling input and output data and control signals for the camera; an on-chip multiplexer; a register set; and a test access element for verifying camera internal functionality, said test access element comprises one or more IO pins, wherein the one or more IO pins is either connected to the register set for controlling external functions or connected to internal data inputs and outputs for testing purpose, wherein the connection of the one or more IO pins is controlled by the on-chip multiplexer, wherein said image sensor, said image-processing element, said data storage element, said communication interface, said on-chip multiplexer, said register set and said test access element are on said single chip integrated circuit camera.
Claim 3
Dependent Claim 15 words
The camera system of claim 1 , wherein the image sensor comprises a sensor array.
Claim 4
Dependent Claim 18 words
The camera system of claim 2 , wherein the image sensor further comprises a built-in correlated double sampler.
Claim 5
Dependent Claim 17 words
The camera system of claim 3 , wherein the image sensor further comprises an internal analog-to-digital converter.
Claim 6
Dependent Claim 16 words
The camera system of claim 4 , wherein the image sensor further comprising a timing circuitry.
Claim 7
Dependent Claim 26 words
The method of claim 5 , wherein the output data is generated as an 8-bit raw data, a horizontal sync signal, and a vertical sync signal.
Claim 8
Dependent Claim 26 words
The method of claim 5 , wherein the output data is generated as an 10-bit raw data, a horizontal sync signal, and a vertical sync signal.
Claim 9
Dependent Claim 26 words
The method of claim 5 , wherein the output data is generated as a 12-bit raw data, a horizontal sync signal, and a vertical sync signal.
Claim 10
Dependent Claim 19 words
The camera system of claim 1 , wherein the image-processing element comprises an element for image rendering or enhancement.
Claim 11
Dependent Claim 17 words
The camera system of claim 1 , wherein the image-processing element comprises an element for image recognition.
Claim 12
Dependent Claim 17 words
The camera system of claim 1 , wherein the image-processing element comprises an element for image compression.
Claim 13
Dependent Claim 18 words
The camera system of claim 1 , wherein the image-processing element is implemented with specific hardware accelerated circuits.
Claim 14
Dependent Claim 17 words
The camera system of claim 1 , wherein the image-processing element is implemented with embedded microprocessor firmware.
Claim 15
Dependent Claim 18 words
The camera system of claim 1 , wherein the data storage element comprises a static random access memory.
Claim 16
Dependent Claim 18 words
The camera system of claim 1 , wherein the data storage element comprises a dynamic random access memory.
Claim 17
Dependent Claim 16 words
The camera system of claim 1 , wherein the data storage element comprises a non-volatile memory.
Claim 18
Dependent Claim 21 words
The camera system of claim 1 , wherein the communication interface element comprises an interface to a control or transmission interface.
Claim 19
Dependent Claim 19 words
The camera system of claim 1 , wherein the communication interface element comprises an interface to a memory interface.
Claim 20
Dependent Claim 19 words
The camera system of claim 1 , wherein the communication interface element comprises an interface to a display interface.
Claim 21
Dependent Claim 19 words
The camera system of claim 1 , wherein the communication interface element comprises an interface to an audio interface.
Claim 22
Dependent Claim 26 words
The camera system of claim 1 , further comprising a power-monitoring block for shutting down all activities on the single-chip camera during a low power state.
Claim 23
Dependent Claim 17 words
The camera system of claim 1 , further comprising a set of one or more control registers.
Claim 24
Dependent Claim 27 words
The camera system of claim 22 , further comprising a register control logic element for translating control data to and from the one or more control registers.
Claim 25
Dependent Claim 30 words
The camera system of claim 23 , further comprising a serial decoder for translating high speed requests from the communication interface element into lower speed requests for the image sensor.
Claim 26
Dependent Claim 19 words
The camera system of claim 1 , wherein each element of the camera is categorized as analog or digital.
Claim 27
Dependent Claim 18 words
The camera system of claim 25 , wherein electrical activity is separated between analog elements and digital elements.
Claim 28
Independent Claim 177 words
A method for a single-chip integrated circuit camera, comprising the steps of: exposing one or more lines of pixels of a sensor array to light; sampling the one or more lines of pixels with an analog-to-digital converter; applying a correlated double sampling using a image processing element to the sampled pixels to eliminate point-wise fixed pattern noise; adjusting digital gain to preserve color fidelity using said image processing element; sending resulting data to an output control element; and testing internal functionality of the single-chip integrated circuit camera using a test access element comprising one or more IO pins, wherein the one or more IO pins is either connected to a register set for controlling external functions or connected to internal data inputs and outputs for testing purpose, wherein the connection of the one or more IO pins is controlled by an on-chip multiplexer, wherein said image sensor, said analog-to-digital converter, said image processing element, said output control element, said test access element, said register set and said on-chip multiplexer, are on said single chip integrated circuit camera.
Claim 29
Independent Claim 177 words
A method for a single-chip integrated circuit camera, comprising the steps of: exposing one or more lines of pixels of a sensor array to light; sampling the one or more lines of pixels with an analog-to-digital converter; applying a correlated double sampling using a image processing element to the sampled pixels to eliminate point-wise fixed pattern noise; adjusting digital gain to preserve color fidelity using said image processing element; sending resulting data to an output control element; and testing internal functionality of the single-chip integrated circuit camera using a test access element comprising one or more IO pins, wherein the one or more IO pins is either connected to a register set for controlling external functions or connected to internal data inputs and outputs for testing purpose, wherein the connection of the one or more IO pins is controlled by an on-chip multiplexer, wherein said image sensor, said analog-to-digital converter, said image processing element, said output control element, said test access element, said register set and said on-chip multiplexer, are on said single chip integrated circuit camera.
Claim 30
Dependent Claim 19 words
The method of claim 27 , further comprising the step of compressing the data from the output control element.
Claim 31
Dependent Claim 34 words
The method of claim 28 , wherein the compressing step comprises: compressing the data with a differential coding, compressing the resulting compressed data with Huffman coding, and loading the resulting compressed data into packets.
Claim 32
Dependent Claim 25 words
The method of claim 28 , wherein the compressing step comprises: compressing the data with JPEG coding and loading the resulting compressed data into packets.
Claim 33
Dependent Claim 25 words
The method of claim 28 , wherein the compressing step comprises: compressing the data with MPEG coding and loading the resulting compressed data into packets.
Claim 34
Dependent Claim 26 words
The method of claim 28 , wherein the compressing step comprises: compressing the data with a wavelet coding and loading the resulting compressed data into packets.
Claim 35
Dependent Claim 33 words
The method of claim 28 , further comprising the step of sending the compressed data via an interface to a host computer wherein said interface is on said single chip integrated circuit camera.
Claim 36
Dependent Claim 14 words
The method of claim 33 , wherein the interface is an USB interface controller.
Claim 37
Dependent Claim 15 words
The method of claim 33 , wherein the interface is an IEEE 1394 interface controller.
Claim 38
Dependent Claim 15 words
The method of claim 33 , wherein the interface is a hardwired LAN interface controller.
Claim 39
Dependent Claim 15 words
The method of claim 33 , wherein the interface is a Bluetooth wireless interface controller.
Claim 40
Dependent Claim 15 words
The method of claim 33 , wherein the interface is a wireless LAN interface controller.

References Cited (Backward Citations)

US20020050518A1 Cited
US20020176009A1 Cited
US20020039139A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2009-09-25 2010-03-27 2010-09-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2013-09-25 2014-03-27 2014-09-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2017-09-25 2018-03-27 2018-09-26 $7700.00 Window Closed / Lapsed

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