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US7012334B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor chip with bumps and method for manufacturing the same

Assignee: Advanced Semiconductor Engineering Inc
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Filing: 2004-07-29
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Granted: 2006-03-14
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Expires: 2024-07-29
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Abstract

Abstract A method for manufacturing a semiconductor chip with bumps comprises providing a semiconductor chip, which defines an active surface and a back surface and has a plurality of pads disposed on the active surface, and a plurality of preformed solder balls. A passivation is disposed on the active surface of the semiconductor chip with the pads exposed. A plurality of UBMs (Under Bump Metallurgy) are disposed on the pads and define a plurality of bump pads. The diameter of the bump pads is about 100% to about 130% of the diameter of the preformed solder balls. The preformed solder balls are placed on the bump pads and then reflowed to form a plurality of bumps on the semiconductor chip.

Inventors

  • 👤 Chih Chiang Liu
  • 👤 Chi Cheng Pan
  • 👤 Kuo Lung Wang
  • 👤 Che Hsiung Chen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 20:21
CPC Classifications
H; H10; H10W; H10W90/00; H10W90/701; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W70/652; H10W72/00; H10W72/01; H10W72/012; H10W72/01221; H10W72/01225; H10W72/20; H10W72/221; H10W72/251; H10W72/252; H10W72/29; H10W72/90; H10W72/921; H10W72/922; H10W72/923; H10W72/941; H10W72/9415; H10W72/951; H10W72/952

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 120 words
A method for manufacturing a semiconductor chip with bumps comprising the following steps of: providing a semiconductor chip defining an active surface and a back surface and having a plurality of pads disposed on the active surface; providing a plurality of preformed solder balls; disposing a passivation layer on the active surface of the semiconductor chip with the pads exposed; disposing a plurality of UBMs (Under Bump Metallurgy) on the pads and defining a plurality of bump pads, wherein the diameter of the bump pads is about 100% to about 130% of the diameter of the preformed solder balls; placing the preformed solder balls on the bump pads; and reflowing the preformed solder balls to form a plurality of bumps.
Claim 2
Independent Claim 120 words
A method for manufacturing a semiconductor chip with bumps comprising the following steps of: providing a semiconductor chip defining an active surface and a back surface and having a plurality of pads disposed on the active surface; providing a plurality of preformed solder balls; disposing a passivation layer on the active surface of the semiconductor chip with the pads exposed; disposing a plurality of UBMs (Under Bump Metallurgy) on the pads and defining a plurality of bump pads, wherein the diameter of the bump pads is about 100% to about 130% of the diameter of the preformed solder balls; placing the preformed solder balls on the bump pads; and reflowing the preformed solder balls to form a plurality of bumps.
Claim 3
Dependent Claim 26 words
The method according to claim 1 , wherein the height of the bump is about 55% to 65% of the diameter of the preformed solder ball.
Claim 4
Dependent Claim 25 words
The method according to claim 1 , further comprising the following step of: disposing a repassivation layer on the passivation layer with the pads exposed.
Claim 5
Dependent Claim 21 words
The method according to claim 1 , wherein the height of the bump is about 160 μm to about 320 μm.
Claim 6
Dependent Claim 23 words
The method according to claim 1 , wherein the diameter of the preformed solder balls is about 300 μm to about 500 μm.
Claim 7
Independent Claim 156 words
A method for manufacturing a semiconductor chip with bumps comprising the following steps of: providing a semiconductor chip defining an active surface and a back surface and having a plurality of pads disposed on the active surface; providing a plurality of preformed solder balls; disposing a passivation layer on the active surface of the semiconductor chip with the pads exposed; disposing a first repassivation layer on the passivation layer with the pads exposed; forming a plurality of redistribution traces on the first repassivation layer and electrically connected to the pads; disposed a second repassivation layer on the redistribution traces with a part of the redistribution trace exposed for defining a plurality of bump pads, wherein the diameter of the bump pads is about 100% to about 130% of the diameter of the preformed solder balls; placing the preformed solder balls on the bump pads; and reflowing the preformed solder balls to form a plurality of bumps.
Claim 8
Independent Claim 156 words
A method for manufacturing a semiconductor chip with bumps comprising the following steps of: providing a semiconductor chip defining an active surface and a back surface and having a plurality of pads disposed on the active surface; providing a plurality of preformed solder balls; disposing a passivation layer on the active surface of the semiconductor chip with the pads exposed; disposing a first repassivation layer on the passivation layer with the pads exposed; forming a plurality of redistribution traces on the first repassivation layer and electrically connected to the pads; disposed a second repassivation layer on the redistribution traces with a part of the redistribution trace exposed for defining a plurality of bump pads, wherein the diameter of the bump pads is about 100% to about 130% of the diameter of the preformed solder balls; placing the preformed solder balls on the bump pads; and reflowing the preformed solder balls to form a plurality of bumps.
Claim 9
Dependent Claim 21 words
The method according to claim 6 , wherein the height of the bumps is about 160 μm to about 320 μm.
Claim 10
Dependent Claim 23 words
The method according to claim 6 , wherein the diameter of the preformed solder balls is about 300 μm to about 500 μm.
Claim 11
Dependent Claim 92 words
A semiconductor chip with bumps comprising: a semiconductor chip body defining an active surface and a back surface, and having a plurality of pads disposed on the active surface; a passivation disposed on the active surface of the semiconductor chip body with the pads exposed; a plurality of UBMs (Under Bump Metallurgy) electrically connected to the pads and defining a plurality of bump pads; and a plurality of bumps disposed on the bump pads, wherein the diameter of the bump pad is about 155% to 235% of the height of the bump.
Claim 12
Dependent Claim 92 words
A semiconductor chip with bumps comprising: a semiconductor chip body defining an active surface and a back surface, and having a plurality of pads disposed on the active surface; a passivation disposed on the active surface of the semiconductor chip body with the pads exposed; a plurality of UBMs (Under Bump Metallurgy) electrically connected to the pads and defining a plurality of bump pads; and a plurality of bumps disposed on the bump pads, wherein the diameter of the bump pad is about 155% to 235% of the height of the bump.
Claim 13
Dependent Claim 26 words
The semiconductor chip with bumps according to claim 9 , further comprising: a plurality of redistribution traces for electrically connecting the pads to the bump pads.
Claim 14
Dependent Claim 25 words
The semiconductor chip with bumps according to claim 10 , further comprising: a first repassivation layer disposed on the passivation layer with the pads exposed.
Claim 15
Dependent Claim 21 words
The semiconductor chip with bumps according to claim 11 , further comprising: a second repassivation layer disposed on the redistribution traces.
Claim 16
Dependent Claim 24 words
The semiconductor chip with bumps according to claim 9 , further comprising: a repassivation layer disposed on the passivation layer with the pads exposed.
Claim 17
Dependent Claim 24 words
The semiconductor chip with bumps according to claim 9 , wherein the height of the bumps is about 160 μm to about 320 μm.
Claim 18
Dependent Claim 26 words
The semiconductor chip with bumps according to claim 9 , wherein the diameter of the preformed solder balls is about 300 μm to about 500 μm.

References Cited (Backward Citations)

US6805279B2 Cited
US6756671B2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2009-03-13 2009-09-12 2010-03-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2013-03-13 2013-09-12 2014-03-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2017-03-13 2017-09-12 2018-03-14 $7700.00 Window Closed / Lapsed

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