US6865186B1
Expired / Lapsed
US
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Multiple message multilevel analog signal recording and playback system having memory array configurable for analog and digital storage and serial communication
Assignee: Winbond Electronics Corp
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Filing: 2000-02-10
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Granted: 2005-03-08
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Expires: 2020-02-10
Abstract
Abstract A multilevel analog recording and playback system is described. An analog processing circuit processes analog data. A storage circuit includes a non-volatile memory array, a switching circuit, and a communication interface. The non-volatile memory array stores analog and digital data. The switching circuit transfers the analog and digital data to and from the memory array. The communication interface allows a processor to exchange information with the device.
Inventors
- 👤 Geoffrey B. Jackson
- 👤 Saleel V. Awsare
- 👤 Ming-Bing Chang
- 👤 Peter Holzmann
- 👤 Oliver Chihkuang Kao
- 👤 Hung-Chuan Pai
- 👤 Carl R. Palmer
- 👤 Aditya Raina
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 16:47
CPC Classifications
G; G06; G06F; G06F12/00; G11; G11C; G11C27/00; G11C27/005; G11C11/00; G11C11/56; G11C11/5621; G11C7/00; G11C7/16; G11C2207/00; G11C2207/16
Claims Analysis
Total Claims: 33
Claim 1
Independent Claim
98 words
A storage circuit in a device comprising: a non-volatile memory array to store analog and digital data; a switching circuit coupled to the memory array to transfer the analog and digital data to and from the memory array, the switching circuit comprising a digital selector, the digital selector including first and second registers operating in alternate manner during read and write cycles; and a communication interface coupled to the memory array, and the switching circuit to allow a processor to exchange information with the device, the information including a status in response to a request from the processor.
Claim 2
Dependent Claim
98 words
A storage circuit in a device comprising: a non-volatile memory array to store analog and digital data; a switching circuit coupled to the memory array to transfer the analog and digital data to and from the memory array, the switching circuit comprising a digital selector, the digital selector including first and second registers operating in alternate manner during read and write cycles; and a communication interface coupled to the memory array, and the switching circuit to allow a processor to exchange information with the device, the information including a status in response to a request from the processor.
Claim 3
Dependent Claim
32 words
The storage circuit of claim 1 wherein the memory array comprises: a plurality of storage elements, each of the storage elements being configured to store one of the analog and digital data.
Claim 4
Dependent Claim
111 words
The storage circuit of claim 1 wherein the switching circuit further comprises: a buffer and control circuit to control and buffer the analog and digital data in write and read cycles for data transfer with the memory array; an analog input selector coupled to the buffer and control circuit, an analog processing circuit, and the communication interface to transfer the analog data from the analog processing circuit to the buffer and control circuit; and wherein the digital selector is coupled to the buffer and control circuit and the communication interface to transfer the digital data between the buffer and control circuit and the communication interface via the first and second registers.
Claim 5
Dependent Claim
45 words
The storage circuit of claim 3 wherein the buffer and control circuit comprises: an input/output multiplexer to transfer data into and out of the memory array; a program and read circuit coupled to the input/output multiplexer to control programming and reading of the memory array.
Claim 6
Dependent Claim
31 words
The storage circuit of claim 3 wherein the analog input selector comprises: first and second sample and hold circuits operating in alternate manner to transfer analog input to the program/read circuit.
Claim 7
Dependent Claim
16 words
The storage circuit of claim 5 wherein the information further includes a command and a data.
Claim 8
Dependent Claim
79 words
The storage circuit of claim 6 wherein the command is one of a stop, an analog play, an analog play at a play address, an analog record, an analog record at a record address, an analog message cue, and analog message cue at a cue address, a digital read, a digital read at a read address, a digital write, a digital write at a write address, a digital erase, a up/down powering, an address load, and a configuration load.
Claim 9
Dependent Claim
33 words
The storage circuit of claim 7 wherein the status is one of an end of message (EOM) interrupt, a overflow interrupt, a ready, a power-up condition, a play/record indicator, and a device identification.
Claim 10
Dependent Claim
45 words
The storage circuit of claim 3 wherein each of the first and second registers converts parallel digital data from the program/read circuit to serial data to the communication interface and converts serial data from the communication interface to parallel digital data to the program/read circuit.
Claim 11
Dependent Claim
34 words
The storage circuit of claim 1 wherein the communication interface comprises: a serial port coupled to the processor for transferring serial data according to a serial communication protocol, the serial data including the information.
Claim 12
Dependent Claim
110 words
A recording and playback device, comprising: an analog processing circuit to process analog data; and a storage circuit comprising: a non-volatile memory array to store analog and digital data, a switching circuit coupled to the memory array to transfer the analog and digital data to and from the memory array the switching circuit comprising a digital selector, the digital selector including first and second registers operating in alternate manner during read and write cycles, and a communication interface coupled to the memory array and the switching circuit to allow a processor to exchange information with the device, the information including a status in response to a request from the processor.
Claim 13
Dependent Claim
110 words
A recording and playback device, comprising: an analog processing circuit to process analog data; and a storage circuit comprising: a non-volatile memory array to store analog and digital data, a switching circuit coupled to the memory array to transfer the analog and digital data to and from the memory array the switching circuit comprising a digital selector, the digital selector including first and second registers operating in alternate manner during read and write cycles, and a communication interface coupled to the memory array and the switching circuit to allow a processor to exchange information with the device, the information including a status in response to a request from the processor.
Claim 14
Dependent Claim
34 words
The recording and playback device of claim 11 wherein the memory array comprises: a plurality of storage elements, each of the storage elements being configured to store one of the analog and digital data.
Claim 15
Dependent Claim
113 words
The recording and playback device of claim 11 wherein the switching circuit further comprises: a buffer and control circuit to control and buffer the analog and digital data in write and read cycles for data transfer with the memory array; an analog input selector coupled to the buffer and control circuit, an analog processing circuit, and the communication interface to transfer the analog data from the analog processing circuit to the buffer and control circuit; and wherein the digital selector is coupled to the buffer and control circuit and the communication interface to transfer the digital data between the buffer and control circuit and the communication interface via the first and second registers.
Claim 16
Dependent Claim
47 words
The recording and playback device of claim 13 wherein the buffer and control circuit comprises: an input/output multiplexer to transfer data into and out of the memory array; a program and read circuit coupled to the input/output multiplexer to control programming and reading of the memory array.
Claim 17
Dependent Claim
33 words
The recording and playback device of claim 13 wherein the analog input selector comprises: first and second sample and hold circuits operating in alternate manner to transfer analog input to the program/read circuit.
Claim 18
Dependent Claim
18 words
The recording and playback device of claim 15 wherein the information further includes a command and a data.
Claim 19
Dependent Claim
81 words
The recording and playback device of claim 16 wherein the command is one of a stop, an analog play, an analog play at a play address, an analog record, an analog record at a record address, an analog message cue, and analog message cue at a cue address, a digital read, a digital read at a read address, a digital write, a digital write at a write address, a digital erase, a up/down powering, an address load, and a configuration load.
Claim 20
Dependent Claim
35 words
The recording and playback device of claim 17 wherein the status is one of an end of message (EOM) interrupt, a overflow interrupt, a ready, a power-up condition, a play/record indicator, and a device identification.
Claim 21
Dependent Claim
47 words
The recording and playback device of claim 13 wherein each of the first and second registers converts parallel digital data from the program/read circuit to serial data to the communication interface and converts serial data from the communication interface to parallel digital data to the program/read circuit.
Claim 22
Dependent Claim
36 words
The recording and playback device of claim 11 wherein the communication interface comprises: a serial port coupled to the processor for transferring serial data according to a serial communication protocol, the serial data including the information.
Claim 23
Dependent Claim
137 words
A mobile communication system comprising: a baseband circuit; a processor coupled to the baseband circuit; and a recording and playback device coupled to the baseband circuit and the processor, comprising: an analog processing circuit to process analog data, and a storage circuit, the storage circuit comprising: a non-volatile memory array to store analog and digital data, a switching circuit coupled to the memory array to transfer the analog and digital data to and from the memory array, the switching circuit comprising a digital selector, the digital selector including first and second registers operating in alternate manner during read and write cycles, and a communication interface coupled to the memory array and the switching circuit to allow the processor to exchange information with the device, the information including a status in response to a request from the processor.
Claim 24
Dependent Claim
137 words
A mobile communication system comprising: a baseband circuit; a processor coupled to the baseband circuit; and a recording and playback device coupled to the baseband circuit and the processor, comprising: an analog processing circuit to process analog data, and a storage circuit, the storage circuit comprising: a non-volatile memory array to store analog and digital data, a switching circuit coupled to the memory array to transfer the analog and digital data to and from the memory array, the switching circuit comprising a digital selector, the digital selector including first and second registers operating in alternate manner during read and write cycles, and a communication interface coupled to the memory array and the switching circuit to allow the processor to exchange information with the device, the information including a status in response to a request from the processor.
Claim 25
Dependent Claim
33 words
The mobile communication system of claim 21 wherein the memory array comprises: a plurality of storage elements, each of the storage elements being configured to store one of the analog and digital data.
Claim 26
Dependent Claim
110 words
The mobile communication system of claim 21 wherein the switching circuit comprises: a buffer and control circuit to control and buffer the analog and digital data in write and read cycles for data transfer with the memory array; an analog input selector coupled to the buffer and control circuit, an analog processing circuit, and the communication interface to transfer the analog data from the analog processing circuit to the buffer and control circuit; and wherein the digital selector coupled to the buffer and control circuit and the communication interface to transfer the digital data between the buffer and control circuit and the communication interface via the first and second registers.
Claim 27
Dependent Claim
46 words
The mobile communication system of claim 23 wherein the buffer and control circuit comprises: an input/output multiplexer to transfer data into and out of the memory array; a program and read circuit coupled to the input/output multiplexer to control programming and reading of the memory array.
Claim 28
Dependent Claim
32 words
The mobile communication system of claim 23 wherein the analog input selector comprises: first and second sample and hold circuits operating in alternate manner to transfer analog input to the program/read circuit.
Claim 29
Dependent Claim
17 words
The mobile communication system of claim 25 wherein the information further includes a command and a data.
Claim 30
Dependent Claim
80 words
The mobile communication system of claim 26 wherein the command is one of a stop, an analog play, an analog play at a play address, an analog record, an analog record at a record address, an analog message cue, and analog message cue at a cue address, a digital read, a digital read at a read address, a digital write, a digital write at a write address, a digital erase, a up/down powering, an address load, and a configuration load.
Claim 31
Dependent Claim
34 words
The mobile communication system of claim 27 wherein the status is one of an end of message (EOM) interrupt, a overflow interrupt, a ready, a power-up condition, a play/record indicator, and a device identification.
Claim 32
Dependent Claim
46 words
The mobile communication system of claim 23 wherein each of the first and second registers converts parallel digital data from the program/read circuit to serial data to the communication interface and converts serial data from the communication interface to parallel digital data to the program/read circuit.
Claim 33
Dependent Claim
35 words
The mobile communication system of claim 21 wherein the communication interface comprises: a serial port coupled to the processor for transferring serial data according to a serial communication protocol, the serial data including the information.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2008-03-07 | 2008-09-06 | 2009-03-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2012-03-07 | 2012-09-06 | 2013-03-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2016-03-07 | 2016-09-06 | 2017-03-08 | $7700.00 | Window Closed / Lapsed |