US6844690B2
Expired / Lapsed
US
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DC offset compensator
Assignee: Honeywell International Inc
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Filing: 2002-05-24
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Granted: 2005-01-18
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Expires: 2022-05-24
Abstract
Abstract A dc offset compensator receives a three phase ac current signal as an input and provides a dc offset signal correction voltage as an output. The dc offset compensator comprises a processor configured to sample the ac current signal, generate a rotating vector (r) from the sample, extract a dc offset from the sample and to generate a dc offset signal correction voltage from the dc offset. A method of compensating for dc offset in a three phase ac current signal is also presented.
Inventors
- 👤 Gabor Kalman
- 👤 Colin Huggett
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 23:54
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H02M7/5387; H02M7/53871; H02M7/53873
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
132 words
A method of compensating for dc offset in a three phase ac current signal, comprising the steps of: providing a sample of the ac current signal; generating a rotating vector (r) from the sample; extracting a dc offset from the sample; removing the dc offset from the ac current signal; and generating a Park vector representing a total measured current vector (iT) from the sample using the formula: iT=(⅔)(Ia+(a)(Ib)+(a2)(Ic)); where a=exp(j2π/3), Ia equals the amplitude of the phase current A (Ia=I sin(wt)), Ib equals the amplitude of the phase current B (Ib=I sin(wt+π/3)) and Ic equals the amplitude of the phase current C (Ic=I sin(wt+2π/3)) and w=frequency and t=time; wherein the three phases of the ac current signal comprise a phase current A, a phase current B, and a phase current C.
Claim 2
Independent Claim
132 words
A method of compensating for dc offset in a three phase ac current signal, comprising the steps of: providing a sample of the ac current signal; generating a rotating vector (r) from the sample; extracting a dc offset from the sample; removing the dc offset from the ac current signal; and generating a Park vector representing a total measured current vector (iT) from the sample using the formula: iT=(⅔)(Ia+(a)(Ib)+(a2)(Ic)); where a=exp(j2π/3), Ia equals the amplitude of the phase current A (Ia=I sin(wt)), Ib equals the amplitude of the phase current B (Ib=I sin(wt+π/3)) and Ic equals the amplitude of the phase current C (Ic=I sin(wt+2π/3)) and w=frequency and t=time; wherein the three phases of the ac current signal comprise a phase current A, a phase current B, and a phase current C.
Claim 3
Dependent Claim
28 words
The method of claim 1 wherein the step of generating a rotating vector (r) is carried out using the formula: r=exp(jθ*); where θ* equals a first estimated angle.
Claim 4
Dependent Claim
261 words
The method of claim 2 wherein the step of extracting a dc offset comprises the steps of: subtracting a first estimated dc offset current vector (iDC*) from the total measured current vector (iT) to obtain a first estimated positive sequence current vector (iP*); generating a vector cross product of the first estimated positive sequence current vector (iP*) and the rotating vector (r) to obtain an a vector cross product; operating on the vector cross-product with a regulator to produce a signal proportional to the electrical frequency; integrating the signal proportional to the electrical frequency to obtain a new estimated angle (θ**); using the new estimated angle (θ**) in the step of generating a rotating vector (r); subtracting the first estimated positive sequence current (iP*) from the total measured current (iT) to obtain an error signal; multiplying the error signal by the complex conjugate of the rotator vector (r); comparing the error signal to zero; filtering the error signal to remove high frequency components so that the remaining signal is a dc voltage; operating on the dc voltage signal with a regulator; multiplying the output of the regulator by the rotating vector (r), thereby providing a new estimated positive sequence current (iP*); subtracting the new estimated positive sequence current (iP*) from the total measured current vector (iT) to develop the first estimated dc offset current vector iDC* content of the ac current signal; converting the first estimated dc offset current vector (iDC*) to a dc offset signal correction voltage indicative of the dc offset; and outputting the dc offset signal correction voltage.
Claim 5
Dependent Claim
21 words
The method of claim 3 wherein PI regulators are used during each of the steps of regulating the ac current signal.
Claim 6
Dependent Claim
28 words
The method of claim 3 wherein the source of the ac current signal is an inverter and the dc offset signal correction voltage is conducted to the inverter.
Claim 7
Independent Claim
385 words
A method of compensating for dc offset in a three phase ac current signal comprising a phase current A, a phase current B, and a phase current C and comprising the steps of: sampling the ac current signal; generating a rotating vector (r) from the sample using the formula: r=exp(θ*); where θ* equals a first estimated angle; generating a Park vector representing a total measured current vector (iT) from the sample using the formula: iT=(⅔)(Ia+(a)(Ib)+(a2)(Ic)); where a=exp(j2π/3), Ia equals the amplitude of the phase current A (Ia=I sin(wt)), Ib equals the amplitude of the phase current B (Ib=I sin(wt+π/3)) and Ic equals the amplitude of the phase current C (Ic=I sin(wt+2π/3)) and w=frequency and t=time; extracting a dc offset from the sample by: subtracting a first estimated dc offset current vector (iDC*) from the total measured current vector (iT) to obtain a first estimated positive sequence current vector (iP*); generating a vector cross product of the first estimated positive sequence current vector (iP*) and the rotating vector (r) to obtain an a vector cross product; integrating the vector cross product to obtain a second estimated angle θ**; using the new estimated angle θ** in the step of generating a rotating vector (r); subtracting the first estimated dc offset current vector (iDC**) from the total measured current vector (iT) to obtain a second estimated positive sequence current vector (iP**); transforming the second estimated positive sequence current vector (iP**) from a stationary reference frame into a synchronous reference frame by multiplying the second estimated positive sequence current vector (iP**) by exp((j)(−θ**)) to obtain a transformed vector; comparing the transformed vector to zero; returning the transformed vector to the stationary reference frame by multiplying the transformed vector by exp(jθ**) to again obtain the second estimated positive sequence current vector (iP**); subtracting the second estimated positive sequence current vector (iP**) from the total measured current vector (iT) to obtain the first estimated dc offset current vector (iDC*); comparing the first estimated dc offset current vector (iDC*) to zero; converting the first estimated dc offset current vector (iDC*) to a dc offset signal correction voltage indicative of the dc offset; outputting the dc offset signal correction voltage; and removing the dc offset from the ac current signal by combining the dc offset signal correction voltage with the ac current signal.
Claim 8
Independent Claim
385 words
A method of compensating for dc offset in a three phase ac current signal comprising a phase current A, a phase current B, and a phase current C and comprising the steps of: sampling the ac current signal; generating a rotating vector (r) from the sample using the formula: r=exp(θ*); where θ* equals a first estimated angle; generating a Park vector representing a total measured current vector (iT) from the sample using the formula: iT=(⅔)(Ia+(a)(Ib)+(a2)(Ic)); where a=exp(j2π/3), Ia equals the amplitude of the phase current A (Ia=I sin(wt)), Ib equals the amplitude of the phase current B (Ib=I sin(wt+π/3)) and Ic equals the amplitude of the phase current C (Ic=I sin(wt+2π/3)) and w=frequency and t=time; extracting a dc offset from the sample by: subtracting a first estimated dc offset current vector (iDC*) from the total measured current vector (iT) to obtain a first estimated positive sequence current vector (iP*); generating a vector cross product of the first estimated positive sequence current vector (iP*) and the rotating vector (r) to obtain an a vector cross product; integrating the vector cross product to obtain a second estimated angle θ**; using the new estimated angle θ** in the step of generating a rotating vector (r); subtracting the first estimated dc offset current vector (iDC**) from the total measured current vector (iT) to obtain a second estimated positive sequence current vector (iP**); transforming the second estimated positive sequence current vector (iP**) from a stationary reference frame into a synchronous reference frame by multiplying the second estimated positive sequence current vector (iP**) by exp((j)(−θ**)) to obtain a transformed vector; comparing the transformed vector to zero; returning the transformed vector to the stationary reference frame by multiplying the transformed vector by exp(jθ**) to again obtain the second estimated positive sequence current vector (iP**); subtracting the second estimated positive sequence current vector (iP**) from the total measured current vector (iT) to obtain the first estimated dc offset current vector (iDC*); comparing the first estimated dc offset current vector (iDC*) to zero; converting the first estimated dc offset current vector (iDC*) to a dc offset signal correction voltage indicative of the dc offset; outputting the dc offset signal correction voltage; and removing the dc offset from the ac current signal by combining the dc offset signal correction voltage with the ac current signal.
Claim 9
Dependent Claim
28 words
The method of claim 6 wherein the source of the ac current signal is an inverter and the dc offset signal correction voltage is conducted to the inverter.
Claim 10
Dependent Claim
146 words
A dc offset compensator receiving as an input a three phase ac current signal comprising a phase current A, a phase current B, and a phase current C, and providing as an output a dc offset signal correction voltage, the compensator comprising: a processor configured to sample the ac current signal, to generate a rotating vector (r) from the sample, extract a dc offset from the sample, to generate a dc offset signal correction voltage from the dc offset, and to generate a Park vector representing a total measured current vector (iT) from the sample; wherein the processor generates a Park vector using the formula: iT=(⅔)(Ia+(a)(Ib)+(a2)(Ic)); where a=exp(j2π/3), Ia equals the amplitude of the phase current A (Ia=I sin(wt)), Ib equals the amplitude of the phase current B (Ib=I sin(wt+π/3)) and Ic equals the amplitude of the phase current C (Ic=I sin(wt+2π/3)) and w=frequency and t=time.
Claim 11
Dependent Claim
146 words
A dc offset compensator receiving as an input a three phase ac current signal comprising a phase current A, a phase current B, and a phase current C, and providing as an output a dc offset signal correction voltage, the compensator comprising: a processor configured to sample the ac current signal, to generate a rotating vector (r) from the sample, extract a dc offset from the sample, to generate a dc offset signal correction voltage from the dc offset, and to generate a Park vector representing a total measured current vector (iT) from the sample; wherein the processor generates a Park vector using the formula: iT=(⅔)(Ia+(a)(Ib)+(a2)(Ic)); where a=exp(j2π/3), Ia equals the amplitude of the phase current A (Ia=I sin(wt)), Ib equals the amplitude of the phase current B (Ib=I sin(wt+π/3)) and Ic equals the amplitude of the phase current C (Ic=I sin(wt+2π/3)) and w=frequency and t=time.
Claim 12
Dependent Claim
26 words
The dc offset compensator of claim 8 wherein the processor generates a rotating vector (r) using the formula: r=exp(θ*); where θ* equals a first estimated angle.
Claim 13
Dependent Claim
326 words
A dc offset compensator of receiving a three phase ac current signal as an input and providing a dc offset signal correction voltage as an output, comprising: a processor is configured to sample the ac current signal, to generate a rotating vector (r) from the sample, to extract a dc offset from the sample, and to generate a dc offset correction voltage from the dc offset, wherein the processor is configured in a first block to: generate a rotating vector (r) based on a first estimated angle (θ*); generate a Park vector representing the total measured current vector (iT) from the total measured current; subtract an estimated a dc offset current vector (iDC*) from the total measured current vector (iT) to obtain a first estimated positive-sequence current vector (iP*); calculate a vector cross product of the first positive-sequence current vector and the rotating vector (r); and integrate the vector cross product and output a second estimated angle (θ**); the processor is configured in a second block to receive the total measured current vector (iT) and the estimated angle (θ**) and to: subtract the first estimated positive sequence current (iP*) from the total measured current (iT) to obtain an error signal; multiply the error signal by the complex conjugate of the rotator vector (r); compare the error signal to zero; filter the error signal to remove high frequency components so that the remaining signal is a dc voltage; operate on the dc voltage signal with a regulator; multiply the output of the regulator by the rotating vector (r), thereby providing a new estimated positive sequence current (iP*); subtract the new estimated positive sequence current (iP*) from the total measured current vector (iT) to develop the first estimated dc offset current vector iDC* content of the ac current signal; convert the first estimated dc offset current vector (iDC*) to a dc offset signal correction voltage indicative of the dc offset; and output the dc offset signal correction voltage.
Claim 14
Dependent Claim
326 words
A dc offset compensator of receiving a three phase ac current signal as an input and providing a dc offset signal correction voltage as an output, comprising: a processor is configured to sample the ac current signal, to generate a rotating vector (r) from the sample, to extract a dc offset from the sample, and to generate a dc offset correction voltage from the dc offset, wherein the processor is configured in a first block to: generate a rotating vector (r) based on a first estimated angle (θ*); generate a Park vector representing the total measured current vector (iT) from the total measured current; subtract an estimated a dc offset current vector (iDC*) from the total measured current vector (iT) to obtain a first estimated positive-sequence current vector (iP*); calculate a vector cross product of the first positive-sequence current vector and the rotating vector (r); and integrate the vector cross product and output a second estimated angle (θ**); the processor is configured in a second block to receive the total measured current vector (iT) and the estimated angle (θ**) and to: subtract the first estimated positive sequence current (iP*) from the total measured current (iT) to obtain an error signal; multiply the error signal by the complex conjugate of the rotator vector (r); compare the error signal to zero; filter the error signal to remove high frequency components so that the remaining signal is a dc voltage; operate on the dc voltage signal with a regulator; multiply the output of the regulator by the rotating vector (r), thereby providing a new estimated positive sequence current (iP*); subtract the new estimated positive sequence current (iP*) from the total measured current vector (iT) to develop the first estimated dc offset current vector iDC* content of the ac current signal; convert the first estimated dc offset current vector (iDC*) to a dc offset signal correction voltage indicative of the dc offset; and output the dc offset signal correction voltage.
Claim 15
Dependent Claim
347 words
A dc offset compensator receiving a three phase signal from a source and providing a correction signal to an inverter, comprising: an input for receiving a total measured current from the source; a processor connected to the input and configured in a first block to: generate a rotating vector (r) based on a first estimated angle (θ*); generate a Park vector representing the total measured current vector (iT) from the total measured current; subtract an estimated a dc offset current vector (iDC*) from the total measured current vector (iT) to obtain a first estimated positive-sequence current vector (iP*); calculate a vector cross product of the first positive-sequence current vector and the rotating vector (r); and integrate the vector cross product and output a second estimated angle (θ**); the processor configured in a second block to receive the total measured current vector (iT) and the estimated angle (θ**) and to: subtract the first estimated positive sequence current (iP*) from the total measured current (iT) to obtain an error signal; multiply the error signal by the complex conjugate of the rotator vector (r); compare the error signal to zero; filter the error signal to remove high frequency components so that the remaining signal is a dc voltage; operate on the dc voltage signal with a regulator; multiply the output of the regulator by the rotating vector (r), thereby providing a new estimated positive sequence current (iP*); subtract the new estimated positive sequence current (iP*) from the total measured current vector (iT) to develop the first estimated dc offset current vector iDC* content of the ac current signal; convert the first estimated dc offset current vector (iDC*) to a dc offset signal correction voltage indicative of the dc offset; and output the dc offset signal correction voltage the processor configured in a third block to receive the total measured current vector (iT) and the estimated angle (θ**) and to: compare the first estimated dc offset current vector (iDC*) to zero; and convert the first estimated dc offset current vector (iDC*) to a voltage correction signal for input to the inverter.
Claim 16
Dependent Claim
347 words
A dc offset compensator receiving a three phase signal from a source and providing a correction signal to an inverter, comprising: an input for receiving a total measured current from the source; a processor connected to the input and configured in a first block to: generate a rotating vector (r) based on a first estimated angle (θ*); generate a Park vector representing the total measured current vector (iT) from the total measured current; subtract an estimated a dc offset current vector (iDC*) from the total measured current vector (iT) to obtain a first estimated positive-sequence current vector (iP*); calculate a vector cross product of the first positive-sequence current vector and the rotating vector (r); and integrate the vector cross product and output a second estimated angle (θ**); the processor configured in a second block to receive the total measured current vector (iT) and the estimated angle (θ**) and to: subtract the first estimated positive sequence current (iP*) from the total measured current (iT) to obtain an error signal; multiply the error signal by the complex conjugate of the rotator vector (r); compare the error signal to zero; filter the error signal to remove high frequency components so that the remaining signal is a dc voltage; operate on the dc voltage signal with a regulator; multiply the output of the regulator by the rotating vector (r), thereby providing a new estimated positive sequence current (iP*); subtract the new estimated positive sequence current (iP*) from the total measured current vector (iT) to develop the first estimated dc offset current vector iDC* content of the ac current signal; convert the first estimated dc offset current vector (iDC*) to a dc offset signal correction voltage indicative of the dc offset; and output the dc offset signal correction voltage the processor configured in a third block to receive the total measured current vector (iT) and the estimated angle (θ**) and to: compare the first estimated dc offset current vector (iDC*) to zero; and convert the first estimated dc offset current vector (iDC*) to a voltage correction signal for input to the inverter.
Claim 17
Dependent Claim
81 words
The dc offset compensator of claim 11 wherein: the three phases of the ac current signal comprise a phase current A, a phase current B, and a phase current C; and the processor generates a Park vector using the formula: iT=(⅔)(Ia+(a)(Ib)+(a2)(Ic)); where a=exp(j2π/3), Ia equals the amplitude of the phase current A (Ia=I sin(wt)), Ib equals the amplitude of the phase current B (Ib=I sin(wt+π/3)) and Ic equals the amplitude of the phase current C (Ic=I sin(wt+2π/3)) and w=frequency and t=time.
Claim 18
Dependent Claim
26 words
The dc offset compensator of claim 11 wherein the processor generates a rotating vector (r) using the formula: r=exp(θ*); where θ* equals a first estimated angle.
Claim 19
Dependent Claim
36 words
The dc offset compensator of claim 11 wherein the processor is further configured in the first block to utilize a PI regulator configured to produce a signal proportional to the electrical frequency of the cross product.
Claim 20
Dependent Claim
36 words
The dc offset compensator of claim 11 wherein the processor is further configured in the second block to utilize a PI regulator to produce a signal proportional to the electrical frequency of the dc voltage signal.
Claim 21
Dependent Claim
20 words
The dc offset compensator of claim 12 wherein the processor is further configured to produce a dc voltage offset signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2008-01-18 | 2008-07-19 | 2009-01-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2012-01-18 | 2012-07-19 | 2013-01-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2016-01-18 | 2016-07-19 | 2017-01-18 | $7700.00 | Window Closed / Lapsed |