Claims Analysis
Total Claims: 57
Claim 1
Independent Claim
141 words
A method for conserving power in a CAN microcontroller, formed by a single integrated circuit (IC), that includes a processor core and a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the method comprising the steps of: placing the processor core in a power-reduction mode of operation; placing the CAN/CAL module in a power-reduction mode of operation; and, activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operations; wherein the CAN/CAL module is placed in the power-reduction mode of operation only after each respective sub-block of the plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 2
Independent Claim
141 words
A method for conserving power in a CAN microcontroller, formed by a single integrated circuit (IC), that includes a processor core and a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the method comprising the steps of: placing the processor core in a power-reduction mode of operation; placing the CAN/CAL module in a power-reduction mode of operation; and, activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operations; wherein the CAN/CAL module is placed in the power-reduction mode of operation only after each respective sub-block of the plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 3
Dependent Claim
20 words
The method as set forth in claim 1 , wherein the incoming CAL/CAN message is a multi-frame, fragmented CAL/CAN message.
Claim 4
Dependent Claim
37 words
The method as set forth in claim 2 , further comprising the step of the CAN/CAL module performing automatic hardware assembly of the multi-frame, fragmented CAL/CAN message while the processor core is its power-reduction mode of operation.
Claim 5
Dependent Claim
41 words
The method as set forth in claim 3 , further comprising the steps of: generating a message-complete interrupt in response to completion of assembly of the multi-frame, fragmented CAL/CAN message; and activating the processor core in response to the message-complete interrupt.
Claim 6
Dependent Claim
54 words
The method as set forth in claim 1 , further comprising repeating the step of placing the CAN/CAL module in a power-reduction mode of operation and activating the CAN/CAL module to process an incoming CAL/CAN message, in seriatim, a plurality of times, while the processor core is in its power reduction mode of operation.
Claim 7
Dependent Claim
19 words
The method as set forth in claim 1 , wherein the power-reduction mode of operation comprises a sleep state.
Claim 8
Dependent Claim
22 words
The method as set forth in claim 1 , wherein the power reduction mode of operation comprises an idle mode of operation.
Claim 9
Dependent Claim
83 words
The method as set forth in claim 1 , wherein the step of placing the processor core in a power reduction mode of operation comprises: generating a clock disable signal having a first logic level if the processor core has pending interrupts, and having a second logic if the processor core has no pending interrupts; and disabling a clock applied to the processor core in response to the clock disable signal to thereby place the processor core in the power-reduction mode of operation.
Claim 10
Independent Claim
285 words
A method for conserving power in a CAN microcontroller that includes a processor core and a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the method comprising the steps of: placing the processor core in a power-reduction mode of operation; placing the CAN/CAL module in a power-reduction mode of operation; and, activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the step of placing the CAN/CAL module in a power-reduction mode operation comprises: each of the plurality of sub-blocks generating a respective first signal having a first logic level if that sub-block is currently active, and having a second logic level if that sub-block us not currently active; generating a second signal having a first logic level if any of the first signals are at the first logic level, and having a second logic level in response to all of the first signals having the second logic level; generating a third signal having a first logic level if the processor core is not idle, and having a second logic level if the processor core is idle; generating a fourth signal having a first logic level if an incoming message is being received, and having a second logic level if an incoming message is not being received; generating a clock disable signal in response to the second, third, and fourth signals all being at their respective second logic level; and disabling a clock applied to the CAN/CAL module in response to the clock disable signal to thereby place the CAN/CAL module in the power-reduction mode of operation.
Claim 11
Independent Claim
285 words
A method for conserving power in a CAN microcontroller that includes a processor core and a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the method comprising the steps of: placing the processor core in a power-reduction mode of operation; placing the CAN/CAL module in a power-reduction mode of operation; and, activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the step of placing the CAN/CAL module in a power-reduction mode operation comprises: each of the plurality of sub-blocks generating a respective first signal having a first logic level if that sub-block is currently active, and having a second logic level if that sub-block us not currently active; generating a second signal having a first logic level if any of the first signals are at the first logic level, and having a second logic level in response to all of the first signals having the second logic level; generating a third signal having a first logic level if the processor core is not idle, and having a second logic level if the processor core is idle; generating a fourth signal having a first logic level if an incoming message is being received, and having a second logic level if an incoming message is not being received; generating a clock disable signal in response to the second, third, and fourth signals all being at their respective second logic level; and disabling a clock applied to the CAN/CAL module in response to the clock disable signal to thereby place the CAN/CAL module in the power-reduction mode of operation.
Claim 12
Independent Claim
288 words
A method for conserving power in a CAN microcontroller that includes a processor core and a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the method comprising the steps of: placing the processor core in a power-reduction mode of operation; placing the CAN/CAL module in a power-reduction mode of operation; and, activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the step of placing the CAN/CAL module in a power reduction mode operation comprises: each of the plurality of sub-blocks generating a respective first signal having a first logic level if that sub-block is currently active, and having a second logic level if that sub-block is not currently active; generating a second signal having a first logic level if any of the first signals are at the first logic level, and having a second logic level in response to all of the first signals having the second logic level; generating a third signal having a first logic level if the processor core has pending interrupts, and having a second logic level if the processor core has no pending interrupts; generating a fourth signal having a first logic level if an incoming message is being received, and having a second logic level if an incoming message is not being received; generating a clock disable signal in response to the second, third, and fourth signals all being at their respective second logic level; and disabling a clock applied to the CAN/CAL module in response to the clock disable signal to thereby place the CAN/CAL module in the power-reduction mode of operation.
Claim 13
Independent Claim
288 words
A method for conserving power in a CAN microcontroller that includes a processor core and a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the method comprising the steps of: placing the processor core in a power-reduction mode of operation; placing the CAN/CAL module in a power-reduction mode of operation; and, activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the step of placing the CAN/CAL module in a power reduction mode operation comprises: each of the plurality of sub-blocks generating a respective first signal having a first logic level if that sub-block is currently active, and having a second logic level if that sub-block is not currently active; generating a second signal having a first logic level if any of the first signals are at the first logic level, and having a second logic level in response to all of the first signals having the second logic level; generating a third signal having a first logic level if the processor core has pending interrupts, and having a second logic level if the processor core has no pending interrupts; generating a fourth signal having a first logic level if an incoming message is being received, and having a second logic level if an incoming message is not being received; generating a clock disable signal in response to the second, third, and fourth signals all being at their respective second logic level; and disabling a clock applied to the CAN/CAL module in response to the clock disable signal to thereby place the CAN/CAL module in the power-reduction mode of operation.
Claim 14
Dependent Claim
23 words
The method as set forth in claim 10 , further comprising the step of activating the processor core in response to an interrupt.
Claim 15
Independent Claim
137 words
A method for conserving power in a CAN microcontroller, formed by a single integrated circuit (IC), that includes a processor core and a CAN/CAL module, the method comprising the steps of: placing the processor core in a power-reduction mode of operation while the CAN/CAL module is actively processing an incoming CAL/CAN message; and, terminating the power-reduction mode of operation in response to an interrupt; wherein the CAN/CAL module automatically assembles incoming, multi-frame, fragmented messages while the processor core remains in its power-reduction mode of operation; and further comprising the step of: placing the CAN/CAL module in a power-reduction mode of operation only after confirming that each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 16
Independent Claim
137 words
A method for conserving power in a CAN microcontroller, formed by a single integrated circuit (IC), that includes a processor core and a CAN/CAL module, the method comprising the steps of: placing the processor core in a power-reduction mode of operation while the CAN/CAL module is actively processing an incoming CAL/CAN message; and, terminating the power-reduction mode of operation in response to an interrupt; wherein the CAN/CAL module automatically assembles incoming, multi-frame, fragmented messages while the processor core remains in its power-reduction mode of operation; and further comprising the step of: placing the CAN/CAL module in a power-reduction mode of operation only after confirming that each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 17
Dependent Claim
19 words
The method as set forth in claim 12 , wherein the power-reduction mode of operation comprises a sleep state.
Claim 18
Dependent Claim
21 words
The method as set forth in claim 12 , wherein the power-reduction mode of operation comprises an idle mode of operation.
Claim 19
Dependent Claim
40 words
The method as set forth in claim 12 , wherein the CAN/CAL module generates a message-complete interrupt in response to completion of assembly of the multi-frame, fragmented message, whereby the terminating step is executed in response to the message-complete interrupt.
Claim 20
Dependent Claim
83 words
The method as set forth in claim 12 , wherein the step of placing the processor core in a power-reduction mode of operation comprises: generating a clock disable signal having a first logic level if the processor core has pending interrupts, and having a second logic level if the processor core has no pending interrupts; and disabling a clock applied to the processor core in response to the clock disable signal to thereby place the processor core in the power-reduction mode of operation.
Claim 21
Independent Claim
131 words
A method for conserving power in a CAN microcontroller, formed by a single integrated circuit (IC), that includes a processor core and a CAN/CAL module, the method comprising the steps of: placing the entire CAN microcontroller, including both the processor core and the CAN/CAL module in a power-down mode of operation only after detecting that each respective sub-block of the plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected; detecting receipt of an incoming message; and, activating the CAN/CAL module in response to the detecting step to process the incoming message, thereby terminating the power-down mode of operation of the CAN/CAL module, without terminating the power-down mode of operation of the processor core.
Claim 22
Independent Claim
131 words
A method for conserving power in a CAN microcontroller, formed by a single integrated circuit (IC), that includes a processor core and a CAN/CAL module, the method comprising the steps of: placing the entire CAN microcontroller, including both the processor core and the CAN/CAL module in a power-down mode of operation only after detecting that each respective sub-block of the plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected; detecting receipt of an incoming message; and, activating the CAN/CAL module in response to the detecting step to process the incoming message, thereby terminating the power-down mode of operation of the CAN/CAL module, without terminating the power-down mode of operation of the processor core.
Claim 23
Dependent Claim
68 words
The method as set forth in claim 17 , further comprising the step of placing the processor core in a power reduction mode of operation in response to the detecting step, wherein: the processor core can be substantially instantaneously woken up when in the power-down mode of operation; and the processor core can be woken up over a prescribed wake-up period when in the power-down mode of operation.
Claim 24
Dependent Claim
56 words
The method as set forth in claim 17 , wherein the placing step comprises: determining whether the CAN/CAL module is ready to be placed into the power-down mode of operation; and stopping a main system clock in response to a determination that the CAN/CAL module is ready to be placed into the power-down mode of operation.
Claim 25
Dependent Claim
30 words
The method as set forth in claim 18 , wherein the CAN/CL module automatically assembles incoming, multi-frame, fragmented messages while the processor core remains in its power-reduction mode of operation.
Claim 26
Dependent Claim
40 words
The method as set forth in claim 17 , further comprising the step of terminating the power-down mode of operation of the entire CAN microcontroller, including both the processor core and the CAN/CAL module, in response to an external interrupt.
Claim 27
Dependent Claim
40 words
The method as set forth in claim 18 , further comprising the step of terminating the power-down mode of operation of the entire CAN microcontroller, including both the processor core and the CAN/CAL module, in response to system reset command.
Claim 28
Dependent Claim
147 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the processor core in a power-reduction mode of operation; means for placing the CAN/CAL module in a power-reduction mode of operation; and, means for activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the CAN/CAL module is placed in the power-reduction mode of operation only after each respective sub-block of the plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 29
Dependent Claim
147 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the processor core in a power-reduction mode of operation; means for placing the CAN/CAL module in a power-reduction mode of operation; and, means for activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the CAN/CAL module is placed in the power-reduction mode of operation only after each respective sub-block of the plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 30
Dependent Claim
21 words
The CAN microcontroller as set forth in claim 23 , wherein the incoming CAL/CAN message is a multi-frame, fragmented CAL/CAN message.
Claim 31
Dependent Claim
38 words
The CAN microcontroller as set forth in claim 24 , wherein the CAN/CAL module is operable to perform automatic hardware assembly of the multi-frame, fragmented CAL/CAN message while the processor core is in its power-reduction mode of operation.
Claim 32
Dependent Claim
48 words
The CAN microcontroller as set forth in claim 25 , wherein the power control module further includes: means for generating a message-complete interrupt in response to completion of assembly of the multi-frame, fragmented CAL/CAN message; and means for activating the processor core in response to the message-complete interrupt.
Claim 33
Dependent Claim
20 words
The CAN microcontroller as set forth in claim 23 , wherein the power-reduction mode of operation comprises a sleep state.
Claim 34
Dependent Claim
22 words
The CAN microcontroller as set forth in claim 23 , wherein the power-reduction mode of operation comprises an idle mode of operation.
Claim 35
Dependent Claim
87 words
The CAN microcontroller as set forth in claim 23 , wherein the means for placing the CAN/CAL module in a power-reduction mode operation comprises: means for generating a clock disable signal having a first logic level if the processor core has pending interrupts, and having a second logic level if the processor core has no pending interrupts; and means for disabling a clock applied to the processor core in response to the clock disable signal to thereby place the processor core in the power-reduction mode of operation.
Claim 36
Dependent Claim
312 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the processor core in a power-reduction mode of operation; means for placing the CAN/CAL module in a power-reduction mode of operation; and, means for activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the means for placing the CAN/CAL module in a power-reduction mode operation comprises: means associated with each of the plurality of sub-blocks for generating a respective first signal having a first logic level if that sub-block is currently active, and having a second logic level if that sub-block is not currently active; means for generating a second signal having a first logic level if any of the first signals are at the first logic level, and having a second logic level in response to all of the first signals having the second logic level; means for generating a third signal having a first logic level if the processor core is not idle, and having a second logic level if the processor core is idle; means for generating a fourth signal having a first logic level if an incoming message is being received, and having a second logic level if an incoming message is not being received; means for generating a clock disable signal in response to the second, third, and fourth signals all being at their respective second logic level; and means for disabling a clock applied to the CAN/CAL module in response to the clock disable signal to thereby place the CAN/CAL module in the power-reduction mode of operation.
Claim 37
Dependent Claim
312 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the processor core in a power-reduction mode of operation; means for placing the CAN/CAL module in a power-reduction mode of operation; and, means for activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the means for placing the CAN/CAL module in a power-reduction mode operation comprises: means associated with each of the plurality of sub-blocks for generating a respective first signal having a first logic level if that sub-block is currently active, and having a second logic level if that sub-block is not currently active; means for generating a second signal having a first logic level if any of the first signals are at the first logic level, and having a second logic level in response to all of the first signals having the second logic level; means for generating a third signal having a first logic level if the processor core is not idle, and having a second logic level if the processor core is idle; means for generating a fourth signal having a first logic level if an incoming message is being received, and having a second logic level if an incoming message is not being received; means for generating a clock disable signal in response to the second, third, and fourth signals all being at their respective second logic level; and means for disabling a clock applied to the CAN/CAL module in response to the clock disable signal to thereby place the CAN/CAL module in the power-reduction mode of operation.
Claim 38
Dependent Claim
314 words
A CAN microcontroller, formed by a single integrated circuit (IC) comprising: a processor core that runs CAN applications; a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the processor core in a power-reduction mode of operation; means for placing the CAN/CAL module in a power-reduction mode of operation; and, means for activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the means for placing the CAN/CAL module in a power-reduction mode operation comprises: means associated with each of the plurality of sub-blocks for generating a respective first signal having a first logic level if that sub-block is currently active, and having a second logic level if that sub-block is not currently active; means for generating a second signal having a first logic level if any of the first signals are at the first logic level, and having a second logic level in response to all of the first signals having the second logic level; means for generating a third signal having a first logic level if the processor core has pending interrupts, and having a second logic level if the processor core has no pending interrupts; means for generating a fourth signal having a first logic level if an incoming message is being received, and having a second logic level if an incoming message is not being received; means for generating a clock disable signal in response to the second, third and fourth signals all being at their respective second logic level; and means for disabling a clock applied to the CAN/CAL module in response to the clock disable signal to thereby place the CAN/CAL module in the power-reduction mode of operation.
Claim 39
Dependent Claim
314 words
A CAN microcontroller, formed by a single integrated circuit (IC) comprising: a processor core that runs CAN applications; a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the processor core in a power-reduction mode of operation; means for placing the CAN/CAL module in a power-reduction mode of operation; and, means for activating the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the means for placing the CAN/CAL module in a power-reduction mode operation comprises: means associated with each of the plurality of sub-blocks for generating a respective first signal having a first logic level if that sub-block is currently active, and having a second logic level if that sub-block is not currently active; means for generating a second signal having a first logic level if any of the first signals are at the first logic level, and having a second logic level in response to all of the first signals having the second logic level; means for generating a third signal having a first logic level if the processor core has pending interrupts, and having a second logic level if the processor core has no pending interrupts; means for generating a fourth signal having a first logic level if an incoming message is being received, and having a second logic level if an incoming message is not being received; means for generating a clock disable signal in response to the second, third and fourth signals all being at their respective second logic level; and means for disabling a clock applied to the CAN/CAL module in response to the clock disable signal to thereby place the CAN/CAL module in the power-reduction mode of operation.
Claim 40
Dependent Claim
120 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that processes incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the processor core in a power-reduction mode of operation while the CAN/CAL module is actively processing an incoming CAL/CAN message; and, means for terminating the power-reduction mode of operation of said processor core in response to an interrupt; and means for placing the CAN/CAL module in a power-reduction mode, each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 41
Dependent Claim
120 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that processes incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the processor core in a power-reduction mode of operation while the CAN/CAL module is actively processing an incoming CAL/CAN message; and, means for terminating the power-reduction mode of operation of said processor core in response to an interrupt; and means for placing the CAN/CAL module in a power-reduction mode, each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 42
Dependent Claim
31 words
The CAN microcontroller as set forth in claim 32 , wherein the CAN/CAL module automatically assembles incoming, multi-frame, fragmented messages while the processor core remains in its power-reduction mode of operation.
Claim 43
Dependent Claim
29 words
The CAN microcontroller as set forth in claim 33 , wherein the CAN/CAL module generates the interrupt in response to completion of assembly of the multi-frame, fragmented CAL/CAN message.
Claim 44
Dependent Claim
89 words
The CAN microcontroller as set forth in claim 32 , wherein the means for placing the processor core in a power-reduction mode of operation comprises: means for generating a clock disable signal having a first logic level if the processor core has pending interrupts, and having a second logic level if the processor core has no pending interrupts; and means for disabling a clock applied to the processor core in response to the clock disable signal to thereby place the processor core in the power reduction mode of operation.
Claim 45
Dependent Claim
173 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that processes incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the entire CAN microcontroller, including both the processor core and the CAN/CAL module in a power-down mode of operation; means for detecting receipt of an incoming message; and, means for activating the CAN/CAL module in response to detection of the receipt of an incoming message, to process the incoming message, thereby terminating the power-down mode of operation of the CAN/CAL module, without terminating the power-down mode of operation of the processor core; wherein the means for placing CAN microcontroller in a power-down mode of operation includes means for determining that each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected before the CAN/CAL module is placed in the power-reduction mode of operation.
Claim 46
Dependent Claim
173 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that processes incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: means for placing the entire CAN microcontroller, including both the processor core and the CAN/CAL module in a power-down mode of operation; means for detecting receipt of an incoming message; and, means for activating the CAN/CAL module in response to detection of the receipt of an incoming message, to process the incoming message, thereby terminating the power-down mode of operation of the CAN/CAL module, without terminating the power-down mode of operation of the processor core; wherein the means for placing CAN microcontroller in a power-down mode of operation includes means for determining that each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected before the CAN/CAL module is placed in the power-reduction mode of operation.
Claim 47
Dependent Claim
77 words
The CAN microcontroller as set forth in claim 36 , wherein the power control module further includes means for placing the processor core in a power-reduction mode of operation in response to detection of the receipt of an incoming message, wherein: the processor core can be substantially instantaneously woken up when in the power-down mode of operation; and the processor core can be woken up over a prescribed wake-up period when in the power-down mode of operation.
Claim 48
Dependent Claim
62 words
The CAN microcontroller as set forth in claim 36 , wherein the means for placing comprises: means for determining whether the CAN/CAL module is ready to be placed into the power-down mode of operation; and means for stopping a main system clock in response to a determination that the CAN/CAL module is ready to be placed into the power-down mode of operation.
Claim 49
Dependent Claim
31 words
The CAN microcontroller as set forth in claim 37 , wherein the CAN/CAL module automatically assembles incoming, multi-frame, fragmented messages while the processor core remains in its power-reduction mode of operation.
Claim 50
Dependent Claim
45 words
The CAN microcontroller as set forth in claim 36 , wherein the power control module further includes means for terminating the power-down mode of operation of the entire CAN microcontroller, including both the processor core and the CAN/CAL module, in response to an external interrupt.
Claim 51
Dependent Claim
46 words
The CAN microcontroller as set forth in claim 36 , wherein the power control module further includes means for terminating the power-down mode of operation of the entire CAN microcontroller, including both the processor core and the CAN/CAL module, in response to a system reset command.
Claim 52
Dependent Claim
158 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: first logic circuitry that places the processor core in a power-reduction mode of operation; second logic circuitry that places the CAN/CAL module in a power-reduction mode of operation; and, third logic circuitry that activates the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the second logic circuitry places the CAN/CAL module in a power reduction mode of operation only after determining each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 53
Dependent Claim
158 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that includes a plurality of sub-blocks that cooperatively function to process incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: first logic circuitry that places the processor core in a power-reduction mode of operation; second logic circuitry that places the CAN/CAL module in a power-reduction mode of operation; and, third logic circuitry that activates the CAN/CAL module to process an incoming CAL/CAN message, thereby terminating the power-reduction mode of operation thereof, while the processor core is in its power-reduction mode of operation; wherein the second logic circuitry places the CAN/CAL module in a power reduction mode of operation only after determining each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 54
Dependent Claim
139 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that processes incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: first logic circuitry that places the processor core in a power-reduction mode of operation while the CAN/CAL module is actively processing an incoming CAL/CAN message, wherein the first logic circuitry places the CAN/CAL module in a power reduction mode of operation only after determining that each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected subsequent to the active processing of a current CAL/CAN message; and, second logic circuitry that terminates the power-reduction mode of operation in response to an interrupt.
Claim 55
Dependent Claim
139 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that processes incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: first logic circuitry that places the processor core in a power-reduction mode of operation while the CAN/CAL module is actively processing an incoming CAL/CAN message, wherein the first logic circuitry places the CAN/CAL module in a power reduction mode of operation only after determining that each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected subsequent to the active processing of a current CAL/CAN message; and, second logic circuitry that terminates the power-reduction mode of operation in response to an interrupt.
Claim 56
Dependent Claim
169 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that processes incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: first logic circuitry that places the entire CAN microcontroller, including both the processor core and the CAN/CAL module in a power-down mode of operation; second logic circuitry that detects receipt of an incoming message; and, third logic circuitry that activates the CAN/CAL module in response to detection of the receipt of an incoming message, to process the incoming message, thereby terminating the power-down mode of operation of the CAN/CAL module, without terminating the power-down mode of operation of the processor core; wherein the first logic circuitry places the CAN/CAL module in a power reduction mode of operation only after determining that each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.
Claim 57
Dependent Claim
169 words
A CAN microcontroller, formed by a single integrated circuit (IC), comprising: a processor core that runs CAN applications; a CAN/CAL module that processes incoming CAL/CAN messages, the CAN/CAL module including a power control module that includes: first logic circuitry that places the entire CAN microcontroller, including both the processor core and the CAN/CAL module in a power-down mode of operation; second logic circuitry that detects receipt of an incoming message; and, third logic circuitry that activates the CAN/CAL module in response to detection of the receipt of an incoming message, to process the incoming message, thereby terminating the power-down mode of operation of the CAN/CAL module, without terminating the power-down mode of operation of the processor core; wherein the first logic circuitry places the CAN/CAL module in a power reduction mode of operation only after determining that each respective sub-block of a plurality of sub-blocks of the CAN/CAL module indicates a current inactive state, said processor core indicates a current inactive state, and no incoming CAL/CAN message is detected.