Patent US6703898B2 successfully refreshed from Google Patents.
US6703898B2
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US
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Differential amplifier comprising an unlocking device
Assignee: STMicroelectronics SA
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Filing: 2002-05-13
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Granted: 2004-03-09
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Expires: 2022-05-13
Abstract
Abstract A differential amplifier may include a first stage including a first transistor and a second transistor having the same polarity and assembled to constitute a differential amplifier. The first stage may be supplied by first and second mirror current sources. The differential amplifier may further include a common mode control circuit, which may include two inputs receiving a reference voltage VCM and a common mode voltage controlling the first and second mirror current sources, respectively. The differential amplifier may further include a Miller gain stage having inputs and for a setting gain-band product. The differential amplifier may further include an unlocking circuit, inserted between the common mode voltage and the Miller gain stage inputs, to cause the Miller gain stage to conduct on circuit start-up.
Inventors
- 👤 Claude Renous
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:47
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3001; H03F3/3022; H03F3/3023; H03F1/00; H03F1/08; H03F1/083; H03F1/086; H03F3/3061; H03F3/3062; H03F3/45; H03F3/45071; H03F3/45479; H03F3/45632; H03F3/45636; H03F3/45641; H03F3/45659
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
126 words
A differential amplifier comprising: a first stage comprising first and second transistors of a first polarity connected together in a differential amplifier configuration, first and second current mirror sources for supplying current to said first and second transistors, respectively, and a control circuit having a first input receiving a reference voltage and a second input receiving a representative common mode voltage from outputs of the differential amplifier; a second Miller stage comprising third and fourth transistors of a second polarity receiving output signals from said first stage; and an unlocking circuit connected between the representative common mode voltage and inputs of said second Miller stage for causing a short-circuit to ensure conduction of said third and fourth transistors for initiating start-up of the differential amplifier circuit.
Claim 2
Dependent Claim
126 words
A differential amplifier comprising: a first stage comprising first and second transistors of a first polarity connected together in a differential amplifier configuration, first and second current mirror sources for supplying current to said first and second transistors, respectively, and a control circuit having a first input receiving a reference voltage and a second input receiving a representative common mode voltage from outputs of the differential amplifier; a second Miller stage comprising third and fourth transistors of a second polarity receiving output signals from said first stage; and an unlocking circuit connected between the representative common mode voltage and inputs of said second Miller stage for causing a short-circuit to ensure conduction of said third and fourth transistors for initiating start-up of the differential amplifier circuit.
Claim 3
Dependent Claim
63 words
A differential amplifier according to claim 1 wherein said first and second transistors comprise NMOS transistors; wherein said third and fourth transistors comprise PMOS transistors; and wherein said second Miller stage comprises two PMOS-type transistors connected to define a common source, having drains connected to outputs of the differential amplifier respectively, and having gates connected to respective corresponding outputs from said first stage.
Claim 4
Dependent Claim
80 words
A differential amplifier according to claim 2 wherein said unblocking device comprises two NMOS transistors each having a source, a drain and a gate; wherein the drains are connected to corresponding gates of said third and fourth PMOS transistors; wherein the sources are connected to the representative common mode voltage; and wherein the gates are connected to the reference voltage so as to render said unblocking device conductive when the common mode voltage is significantly smaller than the reference value.
Claim 5
Dependent Claim
21 words
A differential amplifier according to claim 3 further comprising a cascade stage connected between said first stage and second Miller stage.
Claim 6
Dependent Claim
16 words
A differential amplifier according to claim 4 wherein said cascade stage comprises two NPN bipolar transistors.
Claim 7
Dependent Claim
15 words
A differential amplifier according to claim 4 wherein said cascade stage comprises two NMOS transistors.
Claim 8
Dependent Claim
29 words
A differential amplifier according to claim 3 further comprising a resistive bridge for determining the representative common mode voltage and to set to conduction said third and fourth transistors.
Claim 9
Dependent Claim
55 words
A differential amplifier according to claim 1 wherein said first stage further comprises a pair of feedback resistors and a third current source; and wherein said first and second transistors comprise NMOS transistors having gates which receive input signals via said pair of feedback resistors, and having common sources connected to the third current source.
Claim 10
Dependent Claim
66 words
A differential amplifier according to claim 8 wherein said second Miller stage further comprises two additional current sources and respective capacitors connected thereto; and wherein said third and fourth transistors comprise PMOS transistor assembled as a common source and each connected to a respective additional current source and capacitor; and wherein drains of said third and fourth PMOS transistors are connected to respective differential amplifier outputs.
Claim 11
Dependent Claim
52 words
A differential amplifier according to claim 9 wherein said first and second current sources comprise fifth and sixth PMOS transistors being assembled with a common source and each having a drain connected to a corresponding drain of said first and second transistors and further having a gate controlled by said control circuit.
Claim 12
Dependent Claim
53 words
A differential amplifier according to claim 10 wherein said unblocking circuit comprises seventh and eighth NMOS transistors with a gate for receiving the reference voltage and for short-circuiting the representative common mode voltage and gates of said third and fourth transistors when the representative common mode voltage significantly goes below the reference voltage.
Claim 13
Dependent Claim
17 words
A differential amplifier according to claim 11 wherein said seventh and eighth transistors comprise NPN bipolar transistors.
Claim 14
Dependent Claim
32 words
A differential amplifier according to claim 1 wherein said first stage, said second Miller stage and said unlocking circuit are adapted for use in a data communication amplifier of ATM or XDSL-type.
Claim 15
Dependent Claim
140 words
An integrated circuit differential amplifier comprising: a first stage comprising first and second transistors of a first polarity connected together in a differential amplifier configuration, first and second current mirror sources for supplying current to said first and second transistors, respectively, and a control circuit having a first input receiving a reference voltage and a second input receiving a representative common mode voltage from outputs of the differential amplifier; a second Miller stage comprising third and fourth transistors of a second polarity receiving output signals from said first stage; a cascade stage connected between said first stage and second Miller stage; and an unlocking circuit connected between the representative common mode voltage and inputs of said second Miller stage for causing a short-circuit to ensure conduction of said third and fourth transistors for initiating start-up of the differential amplifier circuit.
Claim 16
Dependent Claim
140 words
An integrated circuit differential amplifier comprising: a first stage comprising first and second transistors of a first polarity connected together in a differential amplifier configuration, first and second current mirror sources for supplying current to said first and second transistors, respectively, and a control circuit having a first input receiving a reference voltage and a second input receiving a representative common mode voltage from outputs of the differential amplifier; a second Miller stage comprising third and fourth transistors of a second polarity receiving output signals from said first stage; a cascade stage connected between said first stage and second Miller stage; and an unlocking circuit connected between the representative common mode voltage and inputs of said second Miller stage for causing a short-circuit to ensure conduction of said third and fourth transistors for initiating start-up of the differential amplifier circuit.
Claim 17
Dependent Claim
65 words
An integrated circuit differential amplifier according to claim 14 wherein said first and second transistors comprise NMOS transistors; wherein said third and fourth transistors comprise PMOS transistors; and wherein said second Miller stage comprises two PMOS-type transistors connected to define a common source, having drains connected to outputs of the differential amplifier respectively, and having gates connected to respective corresponding outputs from said first stage.
Claim 18
Dependent Claim
82 words
An integrated circuit differential amplifier according to claim 15 wherein said unblocking device comprises two NMOS transistors each having a source, a drain and a gate; wherein the drains are connected to corresponding gates of said third and fourth PMOS transistors; wherein the sources are connected to the representative common mode voltage; and wherein the gates are connected to the reference voltage so as to render said unblocking device conductive when the common mode voltage is significantly smaller than the reference value.
Claim 19
Dependent Claim
18 words
An integrated circuit differential amplifier according to claim 14 wherein said cascade stage comprises two NPN bipolar transistors.
Claim 20
Dependent Claim
17 words
An integrated circuit differential amplifier according to claim 14 wherein said cascade stage comprises two NMOS transistors.
Claim 21
Dependent Claim
31 words
An integrated circuit differential amplifier according to claim 14 further comprising a resistive bridge for determining the representative common mode voltage and to set to conduction said third and fourth transistors.
Claim 22
Dependent Claim
57 words
An integrated circuit differential amplifier according to claim 14 wherein said first stage further comprises a pair of feedback resistors and a third current source; and wherein said first and second transistors comprise NMOS transistors having gates which receive input signals via said pair of feedback resistors, and having common sources connected to the third current source.
Claim 23
Dependent Claim
68 words
An integrated circuit differential amplifier according to claim 20 wherein said second Miller stage further comprises two additional current sources and respective capacitors connected thereto; and wherein said third and fourth transistors comprise PMOS transistor assembled as a common source and each connected to a respective additional current source and capacitor; and wherein drains of said third and fourth PMOS transistors are connected to respective differential amplifier outputs.
Claim 24
Dependent Claim
54 words
An integrated circuit differential amplifier according to claim 21 wherein said first and second current sources comprise fifth and sixth PMOS transistors being assembled with a common source and each having a drain connected to a corresponding drain of said first and second transistors and further having a gate controlled by said control circuit.
Claim 25
Dependent Claim
55 words
An integrated circuit differential amplifier according to claim 22 wherein said unblocking circuit comprises seventh and eighth NMOS transistors with a gate for receiving the reference voltage and for short-circuiting the representative common mode voltage and gates of said third and fourth transistors when the representative common mode voltage significantly goes below the reference voltage.
Claim 26
Dependent Claim
19 words
An integrated circuit differential amplifier according to claim 23 wherein said seventh and eighth transistors comprise NPN bipolar transistors.
Claim 27
Dependent Claim
34 words
An integrated circuit differential amplifier according to claim 14 wherein said first stage, said second Miller stage and said unlocking circuit are adapted for use in a data communication amplifier of ATM or XDSL-type.
Claim 28
Independent Claim
138 words
A method for providing unblocking in a differential amplifier comprising a first stage including first and second transistors of a first polarity connected together in a differential amplifier configuration, first and second current mirror sources for supplying current to said first and second transistors, respectively, and a control circuit having a first input receiving a reference voltage and a second input receiving a representative common mode voltage from outputs of the differential amplifier, the amplifier also comprising a second Miller stage comprising third and fourth transistors of a second polarity receiving output signals from said first stage, the method comprising: using an unlocking circuit between the representative common mode voltage and inputs of said second Miller stage for causing a short-circuit to ensure conduction of said third and fourth transistors for initiating start-up of the differential amplifier circuit.
Claim 29
Independent Claim
138 words
A method for providing unblocking in a differential amplifier comprising a first stage including first and second transistors of a first polarity connected together in a differential amplifier configuration, first and second current mirror sources for supplying current to said first and second transistors, respectively, and a control circuit having a first input receiving a reference voltage and a second input receiving a representative common mode voltage from outputs of the differential amplifier, the amplifier also comprising a second Miller stage comprising third and fourth transistors of a second polarity receiving output signals from said first stage, the method comprising: using an unlocking circuit between the representative common mode voltage and inputs of said second Miller stage for causing a short-circuit to ensure conduction of said third and fourth transistors for initiating start-up of the differential amplifier circuit.
Claim 30
Dependent Claim
79 words
A method according to claim 26 wherein the unblocking device comprises two NMOS transistors each having a source, a drain and a gate; wherein the drains are connected to corresponding control terminals of said third and fourth transistors; wherein the sources are connected to the representative common mode voltage; and wherein the gates are connected to the reference voltage so as to render said unblocking device conductive when the common mode voltage is significantly smaller than the reference value.
Claim 31
Dependent Claim
20 words
A method according to claim 26 further comprising providing a cascade stage between said first stage and second Miller stage.
Claim 32
Dependent Claim
28 words
Method according to claim 26 further comprising using a resistive bridge for determining the representative common mode voltage and to set to conduction said third and fourth transistors.
Claim 33
Dependent Claim
100 words
A method according to claim 26 wherein said first and second current sources comprise fifth and sixth PMOS transistors being assembled with a common source and each having a drain connected to a corresponding conduction terminal of said first and second transistors and further having a gate controlled by said control circuit; and wherein said unblocking circuit comprises seventh and eighth NMOS transistors with a gate for receiving the reference voltage and for short-circuiting the representative common mode voltage and control terminals of said third and fourth transistors when the representative common mode voltage significantly goes below the reference voltage.
Claim 34
Dependent Claim
31 words
A method according to claim 26 wherein said first stage, said second Miller stage and said unlocking circuit are adapted for use in a data communication amplifier of ATM or XDSL-type.
References Cited (Backward Citations)
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