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US6639849B2
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Nonvolatile semiconductor memory device programming second dynamic reference cell according to threshold value of first dynamic reference cell
Assignee: Infineon Technologies LLC
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Filing: 2003-02-03
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Granted: 2003-10-28
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Expires: 2023-02-03
Abstract
Abstract In a nonvolatile semiconductor memory device, first and second dynamic reference cells are subjected to a same rewriting operation as performed to a memory cell. An average reference current is obtained from the first and second dynamic reference cells, and is compared with a current of data read from the memory cell so as to judge a level of the read data. In this configuration, the second dynamic reference cell is programmed according to a threshold value of the first dynamic reference cell.
Inventors
- 👤 Satoshi Takahashi
- 👤 Minoru Yamashita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:29
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C7/00; G11C7/14; G11C16/06; G11C16/26; G11C16/28; G11C16/04; G11C16/0466; G11C16/0475
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
90 words
A nonvolatile semiconductor memory device including: a memory cell; first and second dynamic reference cells subjected to a same rewriting as performed to said memory cell; and a data judgment control circuit obtaining an average reference current from said first and second dynamic reference cells, and comparing a current of data read from said memory cell with said average reference current so as to judge said data, wherein said data judgment control circuit programs the second dynamic reference cell according to a threshold value of the first dynamic reference cell.
Claim 2
Dependent Claim
90 words
A nonvolatile semiconductor memory device including: a memory cell; first and second dynamic reference cells subjected to a same rewriting as performed to said memory cell; and a data judgment control circuit obtaining an average reference current from said first and second dynamic reference cells, and comparing a current of data read from said memory cell with said average reference current so as to judge said data, wherein said data judgment control circuit programs the second dynamic reference cell according to a threshold value of the first dynamic reference cell.
Claim 3
Dependent Claim
60 words
The nonvolatile semiconductor memory device as claimed in claim 1 , further including a plurality of program-verify reference cells, wherein said data judgment control circuit selects one of said program-verify reference cells according to said threshold value of said first dynamic reference cell, and programs said second dynamic reference cell by using the selected one of said program-verify reference cells.
Claim 4
Dependent Claim
41 words
The nonvolatile semiconductor memory device as claimed in claim 1 , further including a plurality of erase-verify reference cells, wherein said data judgment control circuit judges said threshold value of said first dynamic reference cell by using said erase-verify reference cells.
Claim 5
Dependent Claim
27 words
The nonvolatile semiconductor memory device as claimed in claim 1 , wherein said memory cell stores 2-bit information by trapping an electric charge in a nitride film.
Claim 6
Dependent Claim
87 words
The nonvolatile semiconductor memory device as claimed in claim 4 , further including a plurality of erase-verify reference cells and a plurality of program-verify reference cells, wherein said data judgment control circuit judges said threshold value of said first dynamic reference cell by using said erase-verify reference cells, selects one of said program-verify reference cells according to a result of judging said threshold value of said first dynamic reference cell, and programs said second dynamic reference cell by using the selected one of said program-verify reference cells.
Claim 7
Dependent Claim
81 words
The nonvolatile semiconductor memory device as claimed in claim 4 , further including a plurality of program-verify reference cells, wherein said data judgment control circuit selects one of said program-verify reference cells according to said threshold value of said first dynamic reference cell, and programs an other side than a selected side of said second dynamic reference cell by using the selected one of said program-verify reference cells, the selected side being selected so as to obtain said average reference current.
Claim 8
Dependent Claim
33 words
The nonvolatile semiconductor memory device as claimed in claim 6 , wherein said data judgment control circuit judges said threshold value of said first dynamic reference cell by using said program-verify reference cells.
Claim 9
Dependent Claim
51 words
The nonvolatile semiconductor memory device as claimed in claim 1 , wherein said data judgment control circuit obtains the average reference current from said first and second dynamic reference cells, and programs the second dynamic reference cell by comparing said average reference current with a current of a read reference cell.
Claim 10
Dependent Claim
27 words
The nonvolatile semiconductor memory device as claimed in claim 8 , wherein said memory cell stores 2-bit information by trapping an electric charge in a nitride film.
Claim 11
Dependent Claim
120 words
The nonvolatile semiconductor memory device as claimed in claim 1 , wherein said memory cell stores 2-bit information by trapping an electric charge in a nitride film, and said data judgment control circuit obtains an average reference current used for programming from a selected side of the first dynamic reference cell and an other side than a selected side of the second dynamic reference cell, the selected sides being selected so as to obtain said average reference current used for judging said data read from said memory cell, and programs one of said first dynamic reference cell and said second dynamic reference cell by comparing said average reference current used for programming with a current of a read reference cell.
References Cited (Backward Citations)
US20010053104A1
Cited
US6538922B1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-10-27 | 2007-04-28 | 2007-10-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-10-27 | 2011-04-28 | 2011-10-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-10-27 | 2015-04-28 | 2015-10-28 | $7700.00 | Window Closed / Lapsed |