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US6605477B2
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Integrated circuit device including a layered superlattice material with an interface buffer layer
Assignee: Nuvoton Technology Corp Japan
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Filing: 2002-09-30
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Granted: 2003-08-12
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Expires: 2022-09-30
Abstract
Abstract An integrated circuit memory device includes a thin film layered superlattice material layer and an electrode. An interface buffer layer is formed between said thin film layered superlattice material layer and said electrode. The interface buffer layer is selected from the group consisting of: 1) simple oxides, not including bismuth, of an A-site or a B-site metal; and 2) second layered superlattice materials different from the first layered superlattice material and containing at least one A-site or B-site metal that is the same as an A-site or B-site metal in the first layered superlattice material. The oxide not including bismuth can be a complex oxide including a plurality of metals or a simple oxide including only one metal. Most preferably, the interface buffer layer is selected from the group consisting of strontium tantalate, bismuth tantalate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide, and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals.
Inventors
- 👤 Kiyoshi Uchiyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 10:36
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6938; H10P14/69398; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10D1/684; H10P14/65; H10P14/6516; H10P14/6544
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
148 words
A method of making an integrated circuit memory device, said method comprising the steps of: depositing a first electrode layer on a substrate; depositing a first interface buffer layer on said substrate, said first interface buffer layer selected from the group consisting of: simple oxides of an A-site or a B-site metal, said simple oxide of an A-site or a B-site metal not including bismuth; and first layered superlattice materials, said simple oxide and said first layered supperlattice materials not including superlattice generator enriched materials; and depositing a thin film second layered superlattice material layer adjacent to said thin film interface buffer layer, said thin film second layered superlattice material layer being a different material than said first interface buffer layer material and containing at least one A-site or B-site metal that is the same as an A-site or B-site metal in said first interface buffer layer material.
Claim 2
Independent Claim
148 words
A method of making an integrated circuit memory device, said method comprising the steps of: depositing a first electrode layer on a substrate; depositing a first interface buffer layer on said substrate, said first interface buffer layer selected from the group consisting of: simple oxides of an A-site or a B-site metal, said simple oxide of an A-site or a B-site metal not including bismuth; and first layered superlattice materials, said simple oxide and said first layered supperlattice materials not including superlattice generator enriched materials; and depositing a thin film second layered superlattice material layer adjacent to said thin film interface buffer layer, said thin film second layered superlattice material layer being a different material than said first interface buffer layer material and containing at least one A-site or B-site metal that is the same as an A-site or B-site metal in said first interface buffer layer material.
Claim 3
Dependent Claim
55 words
A method as in claim 1 wherein said first interface buffer layer is selected from the group consisting of: strontium tantalate, bismuth tantalate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals.
Claim 4
Dependent Claim
83 words
A method as in claim 1 and further including the steps of: depositing a second interface buffer layer on said thin film layered superlattice material layer, said second interface buffer layer selected from the group consisting of, simple oxides, not including bismuth, of an A-site or a B-site metal; and layered superlattice materials; said second interface buffer layer comprising a different material than said thin film second layered superlattice material layer; and depositing a second electrode layer adjacent said second interface buffer layer.
Claim 5
Dependent Claim
55 words
A method as in claim 1 wherein said second interface buffer layer is selected from the group consisting of: strontium tantalate, bismuth tantalate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals.
Claim 6
Dependent Claim
19 words
A method as in claim 1 and further including the step of annealing one or more of said layers.
Claim 7
Dependent Claim
21 words
A method as in claim 1 wherein said interface buffer layer has a thickness ranging from 3 nm to 30 nm.
Claim 8
Dependent Claim
21 words
A method as in claim 6 wherein said interface buffer layer has a thickness ranging from 5 nm to 20 nm.
Claim 9
Independent Claim
117 words
A method of making an integrated circuit memory device, said method comprising the steps of: depositing an electrode layer on said substrate; with said substrate in a deposition chamber, depositing a first interface buffer layer on said substrate, said interface buffer layer selected from the group consisting of simple oxides, of an A-site or a B-site metal, said simple oxide of an A-site or a B-site metal not including bismuth and not including superlattice generator enriched materials; and without removing said substrate from said deposition chamber, switching on a superlattice generator metal source supply to deposit a thin film layered superlattice material layer including said superlattice generator metal adjacent to said thin film layered superlattice material layer.
Claim 10
Independent Claim
117 words
A method of making an integrated circuit memory device, said method comprising the steps of: depositing an electrode layer on said substrate; with said substrate in a deposition chamber, depositing a first interface buffer layer on said substrate, said interface buffer layer selected from the group consisting of simple oxides, of an A-site or a B-site metal, said simple oxide of an A-site or a B-site metal not including bismuth and not including superlattice generator enriched materials; and without removing said substrate from said deposition chamber, switching on a superlattice generator metal source supply to deposit a thin film layered superlattice material layer including said superlattice generator metal adjacent to said thin film layered superlattice material layer.
Claim 11
Dependent Claim
77 words
A method as in claim 8 and further including the step of switching off said superlattice generator metal source supply to deposit a second interface buffer layer on said thin film layered superlattice material layer, said interface buffer layer selected from the group consisting of simple oxides, of an A-site or a B-site metal, said simple oxide of an A-site or a B-site metal not including bismuth; and depositing an electrode layer adjacent said interface buffer layer.
Claim 12
Dependent Claim
55 words
A method as in claim 8 wherein said first interface buffer layer is selected from the group consisting of: strontium tantalate, bismuth tantalate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide, and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals.
Claim 13
Dependent Claim
19 words
A method as in claim 8 and further including the step of annealing one or more of said layers.
Claim 14
Dependent Claim
25 words
A method as in claim 8 wherein said step of switching on a superlattice generator metal source supply includes switching on a supply of bismuth.
Claim 15
Dependent Claim
49 words
A method as in claim 12 wherein said step of depositing said thin film layered superlattice material layer includes depositing a thin film layered superlattice material layer selected from the group consisting of strontium bismuth tantalate, strontium bismuth niobate, strontium bismuth niobium tantalate, bismuth titanate, and bismuth lanthanum titanate.
Claim 16
Dependent Claim
25 words
A method as in claim 8 wherein said step of annealing comprises diffusing said interface buffer layer into said thin film layered superlattice material layer.
Claim 17
Dependent Claim
32 words
A method as in claim 8 wherein said interface buffer layer is deposited on said thin film layered superlattice material layer and said electrode is thereafter deposited on said interface buffer layer.
Claim 18
Independent Claim
159 words
A method of making an integrated circuit memory device, said method comprising the steps of: depositing a first electrode layer on a substrate; depositing a first interface buffer layer on said substrate, said first interface buffer layer selected from the group consisting of strontium tantalate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide, and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals, said oxides not including bismuth and not including superlattice generator enriched materials; baking said integrated circuit device at a soft bake temperature; depositing a thin film layered superlattice material layer adjacent said interface buffer layer, said thin film layered superlattice material layer selected from the group consisting of strontium bismuth tantalate, strontium bismuth niobate, strontium bismuth niobium tantalate, bismuth titanate, and bismuth lanthanum titanate; baking said integrated circuit device at a soft bake temperature; and annealing one or more of said layers.
Claim 19
Independent Claim
159 words
A method of making an integrated circuit memory device, said method comprising the steps of: depositing a first electrode layer on a substrate; depositing a first interface buffer layer on said substrate, said first interface buffer layer selected from the group consisting of strontium tantalate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide, and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals, said oxides not including bismuth and not including superlattice generator enriched materials; baking said integrated circuit device at a soft bake temperature; depositing a thin film layered superlattice material layer adjacent said interface buffer layer, said thin film layered superlattice material layer selected from the group consisting of strontium bismuth tantalate, strontium bismuth niobate, strontium bismuth niobium tantalate, bismuth titanate, and bismuth lanthanum titanate; baking said integrated circuit device at a soft bake temperature; and annealing one or more of said layers.
Claim 20
Dependent Claim
17 words
A method as in claim 16 wherein said step of depositing a superlattice material includes depositing bismuth.
Claim 21
Dependent Claim
25 words
A method as in claim 16 wherein said step of annealing comprises diffusing said interface buffer layer into said thin film layered superlattice material layer.
Claim 22
Dependent Claim
32 words
A method as in claim 16 wherein said interface buffer layer is deposited on said electrode and said thin film layered superlattice material layer is thereafter deposited on said interface buffer layer.
Claim 23
Dependent Claim
32 words
A method as in claim 16 wherein said interface buffer layer is deposited on said thin film layered superlattice material layer and said electrode is thereafter deposited on said interface buffer layer.
Claim 24
Dependent Claim
93 words
A method as in claim 16 and further including the steps of: depositing a second interface buffer layer adjacent said thin film superlattice material layer, said second interface buffer layer selected from the group consisting of strontium tantalate, bismuth tantelate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide, and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals; baking said integrated circuit device at a soft bake temperature; and depositing a second electrode adjacent said second interface buffer layer.
Claim 25
Independent Claim
112 words
A method of making an integrated circuit memory device, said method comprising the steps of: depositing a first electrode layer on a substrate; depositing a first interface buffer layer on said substrate, said first interface buffer layer comprising strontium bismuth tantalum niobate; depositing a thin film layered superlattice material layer adjacent said interface buffer layer, said thin film layered superlattice material layer comprising strontium bismuth tantalate or strontium bismuth tantalum niobate having a lesser amount of niobium than said first interface buffer layer; and annealing said integrated circuit device at a crystallization temperature lower than the crystallization temperature of said thin film layered superlattice material layer without said first interface buffer layer.
Claim 26
Independent Claim
112 words
A method of making an integrated circuit memory device, said method comprising the steps of: depositing a first electrode layer on a substrate; depositing a first interface buffer layer on said substrate, said first interface buffer layer comprising strontium bismuth tantalum niobate; depositing a thin film layered superlattice material layer adjacent said interface buffer layer, said thin film layered superlattice material layer comprising strontium bismuth tantalate or strontium bismuth tantalum niobate having a lesser amount of niobium than said first interface buffer layer; and annealing said integrated circuit device at a crystallization temperature lower than the crystallization temperature of said thin film layered superlattice material layer without said first interface buffer layer.
Claim 27
Dependent Claim
25 words
A method as in claim 22 wherein said step of annealing comprises diffusing said interface buffer layer into said thin film layered superlattice material layer.
Claim 28
Dependent Claim
32 words
A method as in claim 22 wherein said interface buffer layer is deposited on said electrode and said thin film layered superlattice material layer is thereafter deposited on said interface buffer layer.
Claim 29
Dependent Claim
32 words
A method as in claim 22 wherein said interface buffer layer is deposited on said thin film layered superlattice material layer and said electrode is thereafter deposited on said interface buffer layer.
Claim 30
Dependent Claim
90 words
A method as in claim 22 and further including the steps of: depositing a second interface buffer layer adjacent said thin film layered superlattice material layer, said interface buffer layer selected from the group consisting of strontium tantalate, bismuth tantalate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide, and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals; depositing a second electrode layer adjacent said interface buffer layer; and annealing one or more of said layers.
Claim 31
Dependent Claim
30 words
A method as in claim 26 wherein said second interface buffer layer comprises strontium bismuth tantalum niobate having a higher concentration of niobium than said thin film layered superlattice material.
Claim 32
Dependent Claim
20 words
A method as in claim 22 wherein said strontium bismuth tantalate crystallization temperature ranges from 550° C. to 750° C.
References Cited (Backward Citations)
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