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US6602720B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Single transistor ferroelectric transistor structure with high-K insulator and method of fabricating same

Assignee: Sharp Laboratories of America Inc
•
Filing: 2001-03-28
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Granted: 2003-08-05
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Expires: 2021-03-28
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Abstract

Abstract A ferroelectric transistor gate structure with a ferroelectric gate and a high-k insulator is provided. The high-k insulator may serve as both a gate dielectric and an insulator to reduce, or eliminate, the diffusion of oxygen or hydrogen into the ferroelectric gate. A method of forming the ferroelectric gate structure is also provided. The method comprises the steps of forming a sacrificial gate structure, removing the sacrificial gate structure, depositing a high-k insulator, depositing a ferroelectric material, polishing the ferroelectric material using CMP, and forming a top electrode overlying the ferroelectric material.

Inventors

  • 👤 Sheng Teng Hsu
  • 👤 Fengyan Zhang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 01:08
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/671; H10P; H10P10/00; H10D30/00; H10D30/60; H10D30/701; H10D64/01; H10D64/017; H10D64/031; H10D64/033; H10D64/68; H10D64/689; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6339; H10P14/69; H10P14/692; H10P14/6938; H10P14/6939; H10P14/69395; H10P14/69398; H10P95/00; H10P95/06; H10P95/062

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 108 words
A method of fanning a ferroelectric transistor structure on a substrate comprising the steps of: a) depositing and patterning a layer of sacrificial gate material, whereby a sacrificial gate is formed; forming an oxide overlying the sacrificial gate; and polishing the oxide to expose the sacrificial gate; b) removing the sacrificial gate structure to form an open gate region; c) depositing a high-k material over the substrate, partially filing the open gate region, whereby the remaining depth of the open gate region is left open; and d) depositing a ferroelectric material over the high-k material to a thickness greater than the remaining depth of the open gate region.
Claim 2
Independent Claim 108 words
A method of fanning a ferroelectric transistor structure on a substrate comprising the steps of: a) depositing and patterning a layer of sacrificial gate material, whereby a sacrificial gate is formed; forming an oxide overlying the sacrificial gate; and polishing the oxide to expose the sacrificial gate; b) removing the sacrificial gate structure to form an open gate region; c) depositing a high-k material over the substrate, partially filing the open gate region, whereby the remaining depth of the open gate region is left open; and d) depositing a ferroelectric material over the high-k material to a thickness greater than the remaining depth of the open gate region.
Claim 3
Dependent Claim 18 words
The method of claim 1 , wherein the layer of sacrificial gate material is silicon nitride or polysilicon.
Claim 4
Dependent Claim 17 words
The method of claim 1 , wherein the step of polishing is accomplished using chemical-mechanical polishing (CMP).
Claim 5
Dependent Claim 26 words
The method of claim 1 , wherein the step of depositing the high-k material is accomplished by chemical vapor deposition (CVD), pulsed CVD, sputtering, or evaporation.
Claim 6
Dependent Claim 36 words
The method of claim 1 , wherein the step of depositing the high-k material deposits ZrO 2 , zirconium silicate, Zr—Al—Si—O, HfO 2 , hafnium silicate, Hf—Al—O, La—Al—O, lanthanum oxide or Ta 2 O 5 .
Claim 7
Dependent Claim 26 words
The method of claim 1 , wherein the step of depositing the ferroelectric material is accomplished by metal-organic chemical vapor deposition (MOCVD), or chemical-solution deposition (CSD).
Claim 8
Dependent Claim 29 words
The method of claim 1 , wherein the step of depositing the ferroelectric material deposits PGO, PZT, SBT, SBO, SBTO, SBTN, STO, BTO, BLT, LNO or YMnO 3 .
Claim 9
Dependent Claim 15 words
The method of claim 1 , further comprising the step of forming a top electrode.
Claim 10
Dependent Claim 18 words
The method of claim 8 , wherein the top electrode is iridium, platinum, iridium oxide or platinum oxide.
Claim 11
Dependent Claim 24 words
The method of claim 8 , wherein the step of forming the top electrode is accomplished by depositing and patterning a top electrode layer.
Claim 12
Dependent Claim 21 words
The method of claim 8 , wherein the step of forming the top electrode is accomplished by using a damascene process.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-08-04 2007-02-03 2007-08-05 $2000.00 Window Closed / Lapsed
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