Patent US6584142B1 successfully refreshed from Google Patents.
US6584142B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Matched filter
Assignee: Fujitsu Ltd
•
Filing: 1999-12-14
•
Granted: 2003-06-24
•
Expires: 2019-12-14
Abstract
Abstract In a matched filter, a spread data path unit holds inputted spread data, a multiplier unit multiplies an output of the spread data path unit by a spreading replica code, and an adder unit adds results of the multiplication and outputs an added result. The spread data path unit comprises a first selector being able to selectively output the spread data, a plurality of sub spread data path units each having a plurality of latch circuits temporarily holding the spread data from the first selector, and a second selector being able to selectively output outputs from the sub spread data path units, whereby a circuit scale of the spread data path unit is decreased.
Inventors
- 👤 Ben Chen
- 👤 Makoto Uchishima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 20:08
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/69; H04B1/707; H04B1/709; H04B1/7093; H04B2201/00; H04B2201/69; H04B2201/707; H04B2201/70707
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
161 words
A matched filter comprising: a spread data path unit comprising a first selector being able to selectively output spread data, a plurality of sub spread data path units each comprising a plurality of latch circuits temporarily holding the spread data from said first selector, and a second selector being able to selectively output outputs from said sub spread data path units; a spread data path input control unit comprising a selector control unit for performing a selection control on said first selector and said second selector according to an input of the spread data, and a data holding control unit for performing a data holding control on said sub spread data path units; a spreading code setting unit being able to set a spreading code; and an arithmetic unit for multiplying an output from said spread data path unit by the spreading code from said spreading code setting unit, adding results of the multiplication and outputting a result of the addition.
Claim 2
Dependent Claim
161 words
A matched filter comprising: a spread data path unit comprising a first selector being able to selectively output spread data, a plurality of sub spread data path units each comprising a plurality of latch circuits temporarily holding the spread data from said first selector, and a second selector being able to selectively output outputs from said sub spread data path units; a spread data path input control unit comprising a selector control unit for performing a selection control on said first selector and said second selector according to an input of the spread data, and a data holding control unit for performing a data holding control on said sub spread data path units; a spreading code setting unit being able to set a spreading code; and an arithmetic unit for multiplying an output from said spread data path unit by the spreading code from said spreading code setting unit, adding results of the multiplication and outputting a result of the addition.
Claim 3
Dependent Claim
50 words
The matched filter according to claim 1 , wherein said spread data path unit comprises said sub spread data path units equal in number to the number of times of over-sampling; and each of said sub spread data path units is configured with latch circuits equal in number to taps.
Claim 4
Dependent Claim
109 words
The matched filter according to claim 1 , wherein said data holding control unit comprises a round robin ring in which finite-state holding units equal in number to the taps are arranged in a ring; and states of said finite-state holding units equal in number to said taps are successively changed at a chip rate such that a state of only one finite-state holding unit among said finite-state holding units equal in number to said taps differs from a state of the other finite-state holding units, so that data writing to said latch circuits configuring each of said sub spread data path units is updated in a predetermined order.
Claim 5
Dependent Claim
114 words
The matched filter according to claim 1 , wherein said selector control unit comprises a phase counter for generating plural different kinds of phase state signals within one chip duration and cyclically outputting one phase state signal of said different kinds of phase state signals; and said first selector cyclically gives inputted spread data to said sub spread data path units in synchronism with said different kinds of phase state signals from said phase counter, whereas said second selector selects one output among outputs of said sub spread data path units and outputs the selected output in synchronism with a corresponding one of said different kinds of phase state signals from said phase counter.
Claim 6
Dependent Claim
31 words
The matched filter according to claim 4 , wherein said different kinds of phase state signals correspond to phase states equal in number to the number of times of each over-sampling.
Claim 7
Dependent Claim
32 words
The matched filter according to claim 1 , wherein said spreading code setting unit can set plural kinds of spreading codes in order to cope with plural kinds of spread code lengths.
Claim 8
Dependent Claim
69 words
The matched filter according to claim 6 , wherein said spreading code setting unit comprises a code register for holding the spreading code for operation and a code load register being inputted thereto a control signal from the outside to load the next spreading code while said arithmetic unit operates; and said code load register updates contents at a predetermined position of said code register at a predetermined timing.
Claim 9
Dependent Claim
66 words
The matched filter according to claim 7 , wherein said code load register is inputted thereto an enable/disable signal controlled from the outside to capture the next spreading code when said enable/disable signal ifs enable, while not capturing when said enable/disable signal is disable, and is controlled by an algorithm updating contents at the leading position of said code register in synchronism with said code register.
Claim 10
Dependent Claim
130 words
The matched filter according to claim 6 , wherein said spreading code setting unit comprises a code register for holding the spreading code for operation and a code load register being inputted thereto a control signal from the outside to load the next spreading code while said arithmetic unit operates; a multi-tap control unit is disposed on the multiplied output's side of said arithmetic unit in order to cope with plural kinds of spreading codes; said multi-tap control unit comprises a mask ring comprising finite-state holding units not less in number than applied taps; and a logical product of an output of each of said finite-state holding units of said mask ring and a multiplied output of said arithmetic unit is outputted to an adder unit of said arithmetic unit.
Claim 11
Dependent Claim
63 words
The matched filter according to claim 9 , wherein, in said mask ring, continuing finite-state holding units equal in number to the taps among said finite-state holding units hold the same state so that a state thereof differs from a state of the other finite-state holding units; and the leading position in said mask ring is shifted in synchronism with said code register.
Claim 12
Dependent Claim
28 words
The matched filter according to claim 9 , wherein said multi-tap control unit is inputted thereto a spread code identify signal that can be controlled from the outside.
Claim 13
Dependent Claim
114 words
A matched filter comprising: a spread data path unit comprising a plurality of sub spread data path units in each of which a plurality of latch circuits are arranged in order that spread data is inputted thereto; a spread data path input control unit for performing a data writing control to said latch circuits in a predetermined order according to an input of the spread data; a spreading code setting unit being able to set a spreading code; and an arithmetic unit for multiplying an output from said spread data path unit by the spreading code from said spreading code setting unit, adding results of the multiplication and outputting a result of the addition.
Claim 14
Dependent Claim
114 words
A matched filter comprising: a spread data path unit comprising a plurality of sub spread data path units in each of which a plurality of latch circuits are arranged in order that spread data is inputted thereto; a spread data path input control unit for performing a data writing control to said latch circuits in a predetermined order according to an input of the spread data; a spreading code setting unit being able to set a spreading code; and an arithmetic unit for multiplying an output from said spread data path unit by the spreading code from said spreading code setting unit, adding results of the multiplication and outputting a result of the addition.
References Cited (Backward Citations)
US5790591A
Cited
JPH0946173A
Cited
US5903595A
Cited
US6181733B1
Cited
US6330292B1
Cited
US6512785B1
Cited
US6377613B1
Cited
US20020034215A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-06-23 | 2006-12-23 | 2007-06-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-06-23 | 2010-12-23 | 2011-06-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-06-23 | 2014-12-23 | 2015-06-24 | $7700.00 | Window Closed / Lapsed |