Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
372 words
A method for fabricating a MOSFET device on a silicon substrate comprising: forming field oxide regions to define an active region on the silicon substrate provided; forming a oxide film on the active region; forming a polysilicon film on the oxide film; forming a hard mask pattern defining a gate formation region on the polysilicon film; forming a sacrificial gate by etching the polysilicon film and the oxide film using the hard mask pattern as an etching mask and thereby exposing regions of the silicon substrate; forming a thermal oxide film on side walls of the sacrificial gate and the exposed regions of the silicon substrate by a re-oxidation process; implanting impurity ions having a desired conductivity into the silicon substrate using the sacrificial gate as an ion implant mask to form LDD regions in the silicon substrate; removing the thermal oxide film; forming a spacer on the side walls of the sacrificial gate and the hard mask pattern; implanting impurity ions having a desired conductivity into the silicon substrate using the sacrificial gate and the spacers as an ion implantation mask to form source/drain regions in the silicon substrate; depositing an interlayer insulating film; removing a portion of the interlayer insulating film and the hard mask pattern to expose an upper surface of the sacrificial gate; removing the sacrificial gate, thereby forming a groove and exposing that portion of the silicon substrate that had been disposed under the sacrificial gate; etching the exposed silicon substrate to remove a desired thickness and form an etched silicon substrate; forming a sacrificial oxide film of a desired thickness on the etched silicon substrate; implanting a predetermined quantity of impurity ions having a desired conductivity through the sacrificial oxide film and into the silicon substrate to produce a desired threshold voltage; removing the sacrificial oxide film to expose portions of the etched silicon substrate; forming a gate insulating film on the exposed portions of the etched silicon substrate; depositing a metal film, the thickness of the metal film being sufficient to fill the groove; and removing a portion of the metal film to expose a surface of the interlayer insulating film and to form a metal gate in the groove above the gate insulating film.
Claim 2
Independent Claim
372 words
A method for fabricating a MOSFET device on a silicon substrate comprising: forming field oxide regions to define an active region on the silicon substrate provided; forming a oxide film on the active region; forming a polysilicon film on the oxide film; forming a hard mask pattern defining a gate formation region on the polysilicon film; forming a sacrificial gate by etching the polysilicon film and the oxide film using the hard mask pattern as an etching mask and thereby exposing regions of the silicon substrate; forming a thermal oxide film on side walls of the sacrificial gate and the exposed regions of the silicon substrate by a re-oxidation process; implanting impurity ions having a desired conductivity into the silicon substrate using the sacrificial gate as an ion implant mask to form LDD regions in the silicon substrate; removing the thermal oxide film; forming a spacer on the side walls of the sacrificial gate and the hard mask pattern; implanting impurity ions having a desired conductivity into the silicon substrate using the sacrificial gate and the spacers as an ion implantation mask to form source/drain regions in the silicon substrate; depositing an interlayer insulating film; removing a portion of the interlayer insulating film and the hard mask pattern to expose an upper surface of the sacrificial gate; removing the sacrificial gate, thereby forming a groove and exposing that portion of the silicon substrate that had been disposed under the sacrificial gate; etching the exposed silicon substrate to remove a desired thickness and form an etched silicon substrate; forming a sacrificial oxide film of a desired thickness on the etched silicon substrate; implanting a predetermined quantity of impurity ions having a desired conductivity through the sacrificial oxide film and into the silicon substrate to produce a desired threshold voltage; removing the sacrificial oxide film to expose portions of the etched silicon substrate; forming a gate insulating film on the exposed portions of the etched silicon substrate; depositing a metal film, the thickness of the metal film being sufficient to fill the groove; and removing a portion of the metal film to expose a surface of the interlayer insulating film and to form a metal gate in the groove above the gate insulating film.
Claim 3
Dependent Claim
25 words
The method according to claim 1 , wherein the polysilicon film is deposited to the thickness of 2,000 to 4,000 Å using a LP-CVD process.
Claim 4
Dependent Claim
22 words
The method according to claim 1 , wherein the hard mask pattern is formed to the thickness of 800 to 1,000 Å.
Claim 5
Dependent Claim
22 words
The method according to claim 1 , wherein the re-oxidation process is conducted at the temperature of about 650 to 850° C.
Claim 6
Dependent Claim
28 words
The method according to claim 1 , wherein the re-oxidation process is conducted to form a thermal oxide film having the thickness of about 30 to 100 Å.
Claim 7
Dependent Claim
22 words
The method according to claim 1 , wherein the interlayer insulating film is deposited to the thickness of 4,000 to 6,000 Å.
Claim 8
Dependent Claim
27 words
The method according to claim 1 , wherein a thickness of about 300 to 800 Å of the exposed silicon substrate is removed by the etching process.
Claim 9
Dependent Claim
26 words
The method according to claim 1 , wherein the forming of the sacrificial oxide film is conducted at the temperature of about 600 to 800° C.
Claim 10
Dependent Claim
29 words
The method according to claim 1 , wherein the forming of the sacrificial oxide film forms a sacrificial oxide film having the thickness of about 100 to 200 Å.
Claim 11
Dependent Claim
35 words
The method according to claim 1 , wherein the gate insulating film is one selected from a group consisting of oxide, oxynitride, and a high dielectric constant layer having a dielectric constant greater than 15.
Claim 12
Dependent Claim
26 words
The method according to claim 1 , wherein the metal film is one selected from a group consisting of W, WN, Ti, TiN, Mo and Ta.
Claim 13
Dependent Claim
59 words
The method according to claim 1 , wherein the step of removing a portion of the interlayer insulating film comprises a chemical mechanical polishing or etch back process and further wherein the step of removing a portion of the metal film to expose a surface of the interlayer insulating film comprises a chemical mechanical polishing or etch back process.