US6531974B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Controlling time delay
Assignee: Intel Corp
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Filing: 2000-04-07
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Granted: 2003-03-11
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Expires: 2020-04-07
Abstract
Abstract Controlling time delay includes using a delay line and a digital to analog converter configured to provide a signal to the delay line and including digital inputs configured to control the delay through the delay line by controlling amplifier gain elements included in the digital to analog converter.
Inventors
- 👤 Kent R. Callahan
- 👤 Keng L. Wong
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 23:15
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/0805; H03K; H03K5/00; H03K5/13; H03K5/131; H03K5/133; H03L7/099; H03L7/0995; H03K2005/00013; H03K2005/00019; H03K2005/00058; H03K2005/00065; H03K2005/00078; H03K2005/00097; H03K2005/00104; H03K2005/0015; H03K2005/00195; H03K2005/00208
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
50 words
An apparatus, comprising: a delay line; and a digital to analog converter configured to provide a signal to the delay line and to include a plurality of digital inputs configured to control the delay through the delay line by controlling amplifier gain elements included in the digital to analog converter.
Claim 2
Independent Claim
50 words
An apparatus, comprising: a delay line; and a digital to analog converter configured to provide a signal to the delay line and to include a plurality of digital inputs configured to control the delay through the delay line by controlling amplifier gain elements included in the digital to analog converter.
Claim 3
Dependent Claim
30 words
The apparatus of claim 1 in which the digital to analog converter scales the delay through the delay line relative to an output voltage of the digital to analog converter.
Claim 4
Dependent Claim
30 words
The apparatus of claim 1 in which the digital to analog converter scales the delay through the delay line relative to an output current of the digital to analog converter.
Claim 5
Dependent Claim
29 words
The apparatus of claim 1 in which the digital to analog converter scales the delay through the delay line relative to an operating frequency of a phase locked loop.
Claim 6
Independent Claim
63 words
A system comprising: a circuit board; a time delay control chip on the circuit board including a delay line and a digital to analog converter configured to provide a signal to the delay line and to include a plurality of digital inputs configured to control the delay through the delay line by controlling amplifier gain elements included in the digital to analog converter.
Claim 7
Independent Claim
63 words
A system comprising: a circuit board; a time delay control chip on the circuit board including a delay line and a digital to analog converter configured to provide a signal to the delay line and to include a plurality of digital inputs configured to control the delay through the delay line by controlling amplifier gain elements included in the digital to analog converter.
Claim 8
Dependent Claim
30 words
The system of claim 5 in which the digital to analog converter scales the delay through the delay line relative to an output voltage of the digital to analog converter.
Claim 9
Dependent Claim
30 words
The system of claim 5 in which the digital to analog converter scales the delay through the delay line relative to an output current of the digital to analog converter.
Claim 10
Dependent Claim
29 words
The system of claim 5 in which the digital to analog converter scales the delay through the delay line relative to an operating frequency of a phase locked loop.
Claim 11
Independent Claim
41 words
A method comprising: providing n digital inputs to a digital to analog converter; and controlling an output signal of the digital to analog converter by controlling amplifier gain elements included in the digital to analog converter using the n digital inputs.
Claim 12
Independent Claim
41 words
A method comprising: providing n digital inputs to a digital to analog converter; and controlling an output signal of the digital to analog converter by controlling amplifier gain elements included in the digital to analog converter using the n digital inputs.
Claim 13
Dependent Claim
23 words
The method of claim 9 further comprising providing the output signal to a delay line to control the delay through the delay line.
Claim 14
Dependent Claim
29 words
The method of claim 10 in which the digital to analog converter scales the delay through the delay line relative to an operating frequency of a phase locked loop.
Claim 15
Independent Claim
49 words
An apparatus comprising: a delay line; a phase locked loop having a current control; and a replica of the current control configured to receive at a node shared with the current control a first signal from the current control and to send a second signal to the delay line.
Claim 16
Independent Claim
49 words
An apparatus comprising: a delay line; a phase locked loop having a current control; and a replica of the current control configured to receive at a node shared with the current control a first signal from the current control and to send a second signal to the delay line.
Claim 17
Dependent Claim
13 words
The apparatus of claim 12 in which the replica comprises a digital-to-analog converter.
Claim 18
Dependent Claim
13 words
The apparatus of claim 13 in which the digital-to-analog converter includes digital input.
Claim 19
Dependent Claim
20 words
The apparatus of claim 12 in which the phase locked loop and the delay line include substantially identical delay stages.
Claim 20
Dependent Claim
15 words
The apparatus of claim 15 in which the delay stages comprise current starved delay stages.
Claim 21
Dependent Claim
17 words
The apparatus of claim 12 in which the delay line comprises a fixed number of delay stages.
Claim 22
Dependent Claim
26 words
The apparatus of claim 12 in which the time delay on the delay line equals a percentage of an output signal of the phase locked loop.
Claim 23
Independent Claim
26 words
A method comprising: controlling a phase locked loop using a voltage bias; replicating the voltage bias; and controlling a delay line using the replicated voltage bias.
Claim 24
Independent Claim
26 words
A method comprising: controlling a phase locked loop using a voltage bias; replicating the voltage bias; and controlling a delay line using the replicated voltage bias.
Claim 25
Dependent Claim
20 words
The method of claim 19 in which the phase locked loop and the delay line include substantially identical delay stages.
Claim 26
Dependent Claim
15 words
The method of claim 20 in which the delay stages comprise current starved delay stages.
Claim 27
Dependent Claim
17 words
The method of claim 19 in which the delay line comprises a fixed number of delay stages.
Claim 28
Dependent Claim
26 words
The method of claim 19 in which the time delay on the delay line equals a percentage of an output signal of the phase locked loop.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-03-10 | 2006-09-09 | 2007-03-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-03-10 | 2010-09-09 | 2011-03-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-03-10 | 2014-09-09 | 2015-03-11 | $7700.00 | Window Closed / Lapsed |