US6522007B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device having dummy patterns for metal CMP
Assignee: Mitsubishi Electric Corp
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Filing: 2001-10-12
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Granted: 2003-02-18
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Expires: 2021-10-12
Abstract
Abstract A gate electrode has a relatively long gate length of e.g., about 10 μm. In a region immediately above the gate electrode which is sandwiched between first-layer metals provided is a metal dummy pattern having a width in the first direction and extending in the second direction perpendicular to a direction of gate length (direction of current flow). Moreover, a geometric center of the metal dummy pattern in the second direction is equal to a geometric center of the gate electrode in the second direction. This maintains the symmetry in shape of the metal dummy pattern as viewed from the gate electrode. Such a structure can make deterioration in characteristics of a plurality of elements uniform while maintaining the essential effect of a metal CMP.
Inventors
- 👤 Hiroyuki Kouno
- 👤 Toshio Kumamoto
- 👤 Takahiro Miki
- 👤 Hisayasu Satoh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 14:00
CPC Classifications
H; H10; H10D; H10D84/00; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0135; H10D84/02; H10D84/03; H10D84/038; H10P; H10P95/00; H10P95/06; H10P95/062; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/071; H10W20/092; H10W20/40; H10W20/41; H10W20/43; H10W20/497
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
134 words
A semiconductor device comprising: a semiconductor substrate; an insulating film formed on a main surface of said semiconductor substrate; and a plurality of resistive elements formed on an upper surface of said insulating film and arranged in a first direction, wherein each of said plurality of resistive elements extends in a second direction perpendicular to said first direction, which corresponds to a direction of current flow in said each of resistive elements, said semiconductor device further comprising: an interlayer insulating film covering said insulating film and said plurality of resistive elements; and a plurality of metal dummy patterns consecutively arranged on an upper surface of said interlayer insulating film and arranged in stripes at first intervals in said second direction, wherein each of said plurality of metal dummy patterns extends in said first direction.
Claim 2
Dependent Claim
134 words
A semiconductor device comprising: a semiconductor substrate; an insulating film formed on a main surface of said semiconductor substrate; and a plurality of resistive elements formed on an upper surface of said insulating film and arranged in a first direction, wherein each of said plurality of resistive elements extends in a second direction perpendicular to said first direction, which corresponds to a direction of current flow in said each of resistive elements, said semiconductor device further comprising: an interlayer insulating film covering said insulating film and said plurality of resistive elements; and a plurality of metal dummy patterns consecutively arranged on an upper surface of said interlayer insulating film and arranged in stripes at first intervals in said second direction, wherein each of said plurality of metal dummy patterns extends in said first direction.
Claim 3
Dependent Claim
58 words
The semiconductor device according to claim 1 , further comprising: a second interlayer insulating film formed on an upper surface of said interlayer insulating film, covering said interlayer insulating film and said plurality of metal dummy patterns, wherein an interval between the metal dummy patterns adjacent to each other is filled with only the second interlayer insulating film.
Claim 4
Dependent Claim
201 words
The semiconductor device according to claim 1 , wherein said interlayer insulating film and said plurality of metal dummy patterns are defined as a first interlayer insulating film and a plurality of first-layer metal dummy patterns, respectively, said semiconductor device further comprising: a second interlayer insulating film formed on an upper surface of said first interlayer insulating film, covering said first interlayer insulating film and said plurality of first-layer metal dummy patterns; and a plurality of second-layer metal dummy patterns formed on portions of an upper surface of said second interlayer insulating film other than the portions above said plurality of first-layer metal dummy patterns and arranged in stripes at said first intervals in said second direction, wherein each of said plurality of second-layer metal dummy patterns extends in said first direction, said plurality of first-layer metal dummy patterns and said plurality of second-layer metal dummy patterns are arranged at a second interval in a third direction perpendicular to said first direction and said second direction, and a width of each of said plurality of second-layer metal dummy patterns in said second direction is equal to that of each of said plurality of first-layer metal dummy patterns in said second direction.
Claim 5
Dependent Claim
195 words
The semiconductor device according to claim 3 further comprising: a third interlayer insulating film formed on an upper surface of said second interlayer insulating film, covering said second interlayer insulating film and said plurality of second-layer metal dummy patterns; and a plurality of third-layer metal dummy patterns formed on portions of an upper surface of said third interlayer insulating film other than the portions above said plurality of second-layer metal dummy patterns and arranged in stripes at said first intervals in said second direction, wherein each of said plurality of third-layer metal dummy patterns extends in said first direction, a geometric center of each of said plurality of third-layer metal dummy patterns in said first direction coincides with that of a corresponding one of said plurality of first-layer metal dummy patterns in said first direction, said plurality of second-layer metal dummy patterns and said plurality of third-layer metal dummy patterns are arranged at said second interval in said third direction, and a width of each of said plurality of third-layer metal dummy patterns in said second direction is equal to that of each of said plurality of first-layer metal dummy patterns in said second direction.
Claim 6
Dependent Claim
195 words
The semiconductor device according to claim 4 further comprising: a fourth interlayer insulating film formed on an upper surface of said third interlayer insulating film, covering said third interlayer insulating film and said plurality of third-layer metal dummy patterns; and a plurality of fourth-layer metal dummy patterns formed on portions of an upper surface of said fourth interlayer insulating film other than the portions above said plurality of third-layer metal dummy patterns and arranged in stripes at said first intervals in said second direction, wherein each of said plurality of fourth-layer metal dummy patterns extends in said first direction, a geometric center of each of said plurality of fourth-layer metal dummy patterns in said first direction coincides with that of a corresponding one of said plurality of second-layer metal dummy patterns in said first direction, said plurality of third-layer metal dummy patterns and said plurality of fourth-layer metal dummy patterns are arranged at said second interval in said third direction, and a width of each of said plurality of fourth-layer metal dummy patterns in said second direction is equal to that of each of said plurality of first-layer metal dummy patterns in said second direction.
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