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US6487114B2
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Method of reading two-bit memories of NROM cell
Assignee: Macronix International Co Ltd
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Filing: 2001-02-28
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Granted: 2002-11-26
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Expires: 2021-02-28
Abstract
Abstract A method of reading two-bit information in Nitride Read only memory (NROM) cell simultaneously. According to outputted voltage in drain or source of the NROM, it can identify a logical two-bit combination massage of the NROM. The method includes: grounding the source of the NROM; inputting a voltage to the drain of the NROM; inputting a voltage to the gate of the NROM; measuring the outputted current of drain or source; and dividing the outputted current into four different zones, and each zone represents a specific logical two-bit information, which is “0 and 0”, “0 and 1”, “1 and 0”, or “1 and 1”.
Inventors
- 👤 Fuh-Cheng Jong
- 👤 Kent Kuohua Chang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:11
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/26; G11C16/04; G11C16/0466; G11C16/0475
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
109 words
A method of reading two bits logical information simultaneously in Nitride Read Only Memory (NROM) cell, said method comprising the steps of: grounding a first electrode of said NROM to make the voltage of the first electrode to 0; inputing a first voltage to a second electrode of said NROM; inputing a second voltage to the gate of said NROM; measuring the output current of said first electrode of NROM; and analyzing said output current to divide into four different zones by the quantity of said output current, each of said four different zones represents a specific signal combination of said two bits logical information of said NROM cell.
Claim 2
Independent Claim
109 words
A method of reading two bits logical information simultaneously in Nitride Read Only Memory (NROM) cell, said method comprising the steps of: grounding a first electrode of said NROM to make the voltage of the first electrode to 0; inputing a first voltage to a second electrode of said NROM; inputing a second voltage to the gate of said NROM; measuring the output current of said first electrode of NROM; and analyzing said output current to divide into four different zones by the quantity of said output current, each of said four different zones represents a specific signal combination of said two bits logical information of said NROM cell.
Claim 3
Dependent Claim
26 words
The method in claim 1 , wherein said NROM is a programable and erasable read-only memory, and said NROM can store two bits logical information simultaneously.
Claim 4
Dependent Claim
17 words
The method in claim 1 , wherein said first electrode of said NROM is drain or source.
Claim 5
Dependent Claim
21 words
The method in claim 3 , wherein if said first electrode of said NROM is drain, said second electrode is source.
Claim 6
Dependent Claim
21 words
The method in claim 3 , wherein if said first electrode of said NROM is source, said second electrode is drain.
Claim 7
Dependent Claim
17 words
The method in claim 1 , wherein said first voltage is about from 3 to 5 voltage.
Claim 8
Dependent Claim
17 words
The method in claim 1 , wherein said second voltage is about from 2 to 4 voltage.
Claim 9
Dependent Claim
31 words
The method of claim 1 , wherein said specific signal combination of said two bit logical information is “0” and “0”, “0” and “1”, “0” and “1”, or “1” and “1”.
Claim 10
Independent Claim
109 words
A method of reading two bits logical information simultaneously in Nitride Read Only Memory (NROM) cell, said method comprising the steps of: grounding a first electrode of said NROM to make the voltage of the first electrode to 0; inputing a first voltage to a second electrode of said NROM; inputing a second voltage to the gate of said NROM; measuring the output current of said second electrode of NROM; and analyzing said output current to divide into four different zones by the quantity of said output current, each of said four different zones represents a specific signal combination of said two bits logical information of said NROM cell.
Claim 11
Independent Claim
109 words
A method of reading two bits logical information simultaneously in Nitride Read Only Memory (NROM) cell, said method comprising the steps of: grounding a first electrode of said NROM to make the voltage of the first electrode to 0; inputing a first voltage to a second electrode of said NROM; inputing a second voltage to the gate of said NROM; measuring the output current of said second electrode of NROM; and analyzing said output current to divide into four different zones by the quantity of said output current, each of said four different zones represents a specific signal combination of said two bits logical information of said NROM cell.
Claim 12
Dependent Claim
25 words
The method in claim 9 wherein said NROM is a programable and erasable read-only memory, and said NROM can store two bits logical information simultaneously.
Claim 13
Dependent Claim
17 words
The method in claim 9 , wherein said first electrode of said NROM is drain or source.
Claim 14
Dependent Claim
21 words
The method in claim 11 , wherein if said first electrode of said NROM is drain, said second electrode is source.
Claim 15
Dependent Claim
21 words
The method in claim 11 , wherein if said first electrode of said NROM is source, said second electrode is drain.
Claim 16
Dependent Claim
17 words
The method in claim 11 , wherein said first voltage is about from 3 to 5 voltage.
Claim 17
Dependent Claim
17 words
The method in claim 11 , wherein said second voltage is about from 2 to 4 voltage.
Claim 18
Dependent Claim
31 words
The method of claim 9 , wherein said specific signal combination of said two bit logical information is “0” and “0”, “0” and “1”, “0” and “1”, or “1” and “1”.
Claim 19
Independent Claim
120 words
A method of reading two bits logical information simultaneously in Nitride Read Only Memory (NROM) cell, said method comprising the steps of: grounding a first electrode of said NROM to make the voltage of the first electrode to 0; inputing a first voltage to a second electrode of said NROM; inputing a second voltage to the gate of said NROM; measuring the output current of said first electrode of NROM; and analyzing said output current to divide into four different zones by the quantity of said output current, each of said four different zones represents a specific signal combination of said two bits logical information, which is “0” and “0”, “0” and “1”, “0” and “1”, or “1” and “1”.
Claim 20
Independent Claim
120 words
A method of reading two bits logical information simultaneously in Nitride Read Only Memory (NROM) cell, said method comprising the steps of: grounding a first electrode of said NROM to make the voltage of the first electrode to 0; inputing a first voltage to a second electrode of said NROM; inputing a second voltage to the gate of said NROM; measuring the output current of said first electrode of NROM; and analyzing said output current to divide into four different zones by the quantity of said output current, each of said four different zones represents a specific signal combination of said two bits logical information, which is “0” and “0”, “0” and “1”, “0” and “1”, or “1” and “1”.
Claim 21
Dependent Claim
17 words
The method in claim 17 , wherein said first electrode of said NROM is drain or source.
Claim 22
Dependent Claim
21 words
The method in claim 18 , wherein if said first electrode of said NROM is drain, said second electrode is source.
Claim 23
Dependent Claim
21 words
The method in claim 18 , wherein if said first electrode of said NROM is source, said second electrode is drain.
Claim 24
Dependent Claim
17 words
The method in claim 17 , wherein said first voltage is about from 3 to 5 voltage.
Claim 25
Dependent Claim
17 words
The method in claim 17 , wherein said second voltage is about from 2 to 4 voltage.
Claim 26
Independent Claim
120 words
A method of reading two bits logical information simultaneously in Nitride Read Only Memory (NROM) cell, said method comprising the steps of: grounding a first electrode of said NROM to make the voltage of the first electrode to 0; inputing a first voltage to a second electrode of said NROM; inputing a second voltage to the gate of said NROM; measuring the output current of said second electrode of NROM; and analyzing said output current to divide into four different zones by the quantity of said output current, each of said four different zones represents a specific signal combination of said two bits logical information, which is “0” and “0”, “0” and “1”, “0” and “1”, or “1” and “1”.
Claim 27
Independent Claim
120 words
A method of reading two bits logical information simultaneously in Nitride Read Only Memory (NROM) cell, said method comprising the steps of: grounding a first electrode of said NROM to make the voltage of the first electrode to 0; inputing a first voltage to a second electrode of said NROM; inputing a second voltage to the gate of said NROM; measuring the output current of said second electrode of NROM; and analyzing said output current to divide into four different zones by the quantity of said output current, each of said four different zones represents a specific signal combination of said two bits logical information, which is “0” and “0”, “0” and “1”, “0” and “1”, or “1” and “1”.
Claim 28
Dependent Claim
17 words
The method in claim 23 , wherein said first electrode of said NROM is drain or source.
Claim 29
Dependent Claim
21 words
The method in claim 24 , wherein if said first electrode of said NROM is drain, said second electrode is source.
Claim 30
Dependent Claim
21 words
The method in claim 24 , wherein if said first electrode of said NROM is source, said second electrode is drain.
Claim 31
Dependent Claim
17 words
The method in claim 23 , wherein said first voltage is about from 3 to 5 voltage.
Claim 32
Dependent Claim
17 words
The method in claim 23 , wherein said second voltage is about from 2 to 4 voltage.
References Cited (Backward Citations)
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