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US6486739B1
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Amplifier with self-bias boosting using an enhanced wilson current mirror biasing scheme
Assignee: Koninklijke Philips NV
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Filing: 2001-11-08
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Granted: 2002-11-26
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Expires: 2021-11-08
Abstract
Abstract A power amplifier circuit comprises an amplifying transistor and a dc bias circuit, which comprises an enhanced Wilson current mirror as a self-bias boosting circuit for biasing the amplifying transistor through a bias resistor. The current source and the bias resistor are configured to make the charging rate faster than the discharging rate. Furthermore, the current source of the enhanced Wilson current mirror dictates the quiescent current of the amplifying transistor. Preferably, the quiescent current may be set as in direct proportion to the current source by scaling the emitter area ratios between transistor pairs.
Inventors
- 👤 Sifen Luo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 13:37
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/302
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
54 words
A power amplifier circuit, comprising an amplifying transistor and a dc bias circuit, wherein said dc bias circuit comprises a self-bias boosting circuit including an enhanced Wilson current mirror circuit, a portion of which charges said amplifier circuit, and a portion of which discharges said amplifier circuit, said charging and discharging rates being different.
Claim 2
Dependent Claim
54 words
A power amplifier circuit, comprising an amplifying transistor and a dc bias circuit, wherein said dc bias circuit comprises a self-bias boosting circuit including an enhanced Wilson current mirror circuit, a portion of which charges said amplifier circuit, and a portion of which discharges said amplifier circuit, said charging and discharging rates being different.
Claim 3
Dependent Claim
32 words
The power amplifier circuit of claim 1 wherein said enhanced Wilson current mirror has a current source and an output terminal that is coupled to a control terminal of said amplifying transistor.
Claim 4
Dependent Claim
53 words
The power amplifier circuit of claim 2 wherein said enhanced Wilson current mirror comprises a first pair of mirror transistors including a first and a second transistors, and a second pair of mirror transistors including a third and a fourth transistors, with said current source coupled to a collector of said first transistor.
Claim 5
Dependent Claim
43 words
The power amplifier circuit of claim 3 wherein an emitter of said first transistor is coupled to a collector of said third transistor directly, and an emitter of said second transistor is coupled to a collector of said fourth transistor through a resistor.
Claim 6
Dependent Claim
27 words
The power amplifier circuit of claim 4 wherein said output terminal is coupled to said emitter of said first transistor and said collector of said third transistor.
Claim 7
Dependent Claim
59 words
The power amplifier circuit of claim 5 wherein a bias resistor is coupled between said output terminal and said control terminal of said amplifying transistor such that said amplifying transistor is charged by said first transistor through said bias resistor at a charging rate, and is discharged by said third transistor through said bias resistor at a discharging rate.
Claim 8
Dependent Claim
28 words
The power amplifier circuit of claim 6 wherein said bias resistor and said current source are configured such that said charging rate is faster than said discharging rate.
Claim 9
Dependent Claim
13 words
The power amplifier circuit of claim 7 wherein said bias resistor is fixed.
Claim 10
Dependent Claim
56 words
The power amplifier circuit of claim 8 wherein emitter area ratios between said first pair of transistors, between said second pair of transistors and between said amplifying transistor and said second transistor are scaled such that a quiescent current in said amplifying transistor is directly proportional to said current source of said enhanced Wilson current mirror.
Claim 11
Dependent Claim
27 words
The power amplifier circuit of claim 1 wherein said amplifying transistor is a common-emitter transistor, and said control terminal is a base node of said amplifying transistor.
Claim 12
Dependent Claim
16 words
The power amplifier circuit of claim 9 , wherein it is a Class AB amplifier circuit.
Claim 13
Dependent Claim
69 words
A power amplifier circuit for amplifying an input power, said amplifier comprising an amplifying transistor and a dc bias circuit, wherein said dc bias circuit comprises a self-bias boosting circuit capable of charging and discharging said amplifying transistor with a charging rate faster than a discharging rate whereby an average voltage between a control terminal and a common terminal of said amplifying transistor increases as said input power increases.
Claim 14
Dependent Claim
69 words
A power amplifier circuit for amplifying an input power, said amplifier comprising an amplifying transistor and a dc bias circuit, wherein said dc bias circuit comprises a self-bias boosting circuit capable of charging and discharging said amplifying transistor with a charging rate faster than a discharging rate whereby an average voltage between a control terminal and a common terminal of said amplifying transistor increases as said input power increases.
Claim 15
Dependent Claim
18 words
The power amplifier circuit of claim 12 wherein said amplifier circuit has a conduction angle greater than 180°.
Claim 16
Dependent Claim
38 words
The power amplifier of claim 12 wherein said self-bias boosting circuit comprises an enhanced Wilson current mirror having a current source and an output terminal, said output terminal being coupled to a control terminal of said amplifying transistor.
Claim 17
Dependent Claim
30 words
The power amplifier of claim 14 wherein a bias resistor is coupled between said control terminal of said amplifying transistor and said output terminal of said enhanced Wilson current mirror.
Claim 18
Dependent Claim
35 words
The power amplifier of claim 15 wherein said bias resistor is fixed, and said current source of said enhanced Wilson current mirror is controlled such that said charging rate is faster than said discharging rate.
Claim 19
Dependent Claim
34 words
The power amplifier of claim 16 wherein both said bias resistor and said current source of said enhanced Wilson current mirror are configured such that said charging rate is faster than said discharging rate.
Claim 20
Dependent Claim
26 words
The power amplifier of claim 17 wherein said amplifying transistor is a common-emitter transistor, and said control terminal is a base node of said amplifying transistor.
Claim 21
Dependent Claim
74 words
A power amplifier circuit for amplifying an input signal, said amplifier comprising an amplifying transistor and a dc bias circuit including a self-bias boosting circuit, wherein said self-bias boosting circuit comprises a charging circuit for charging said amplifying transistor at a charging rate and a discharging circuit for discharging said amplifying transistor at a discharging rate, wherein said self-bias boosting circuit is configured such that said charging rate is faster than said discharging rate.
Claim 22
Dependent Claim
74 words
A power amplifier circuit for amplifying an input signal, said amplifier comprising an amplifying transistor and a dc bias circuit including a self-bias boosting circuit, wherein said self-bias boosting circuit comprises a charging circuit for charging said amplifying transistor at a charging rate and a discharging circuit for discharging said amplifying transistor at a discharging rate, wherein said self-bias boosting circuit is configured such that said charging rate is faster than said discharging rate.
Claim 23
Dependent Claim
15 words
The power amplifier circuit of claim 19 wherein said amplifying transistor is a FET transistor.
References Cited (Backward Citations)
US6194967B1
Cited
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