US6477683B1
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Automated processor generation system for designing a configurable processor and method for the same
Assignee: Tensilica Inc
•
Filing: 1999-02-05
•
Granted: 2002-11-05
•
Expires: 2019-02-05
Abstract
Abstract An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.
Inventors
- 👤 Earl A. Killian
- 👤 Ricardo E. Gonzalez
- 👤 Ashish B. Dixit
- 👤 Monica Lam
- 👤 Walter D. Lichtenstein
- 👤 Christopher Rowen
- 👤 John C. Ruttenberg
- 👤 Robert P. Wilson
- 👤 Albert Ren-Rui Wang
- 👤 Dror Eliezer Maydan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 20:15
CPC Classifications
G; G06; G06F; G06F8/00; G06F8/20; G06F30/00; G06F30/30; G06F8/40; G06F8/41; G06F8/53; G06F2111/00; G06F2111/02; G06F2115/00; G06F2115/10
Claims Analysis
Total Claims: 106
Claim 1
Independent Claim
44 words
A system for designing a configurable processor, the system comprising: means for, based on a configuration specification, generating a description of a hardware implementation of the processor; and means for, based on the configuration specification, generating software development tools specific to the hardware implementation.
Claim 2
Independent Claim
44 words
A system for designing a configurable processor, the system comprising: means for, based on a configuration specification, generating a description of a hardware implementation of the processor; and means for, based on the configuration specification, generating software development tools specific to the hardware implementation.
Claim 3
Dependent Claim
18 words
The system of claim 1 , wherein the software development tools generate code to run on the processor.
Claim 4
Dependent Claim
29 words
The system of claim 1 , wherein the software development tools include a compiler, tailored to the configuration specification, for compiling an application into code executable by the processor.
Claim 5
Dependent Claim
29 words
The system of claim 1 , wherein the software development tools include an assembler, tailored to the configuration specification, for assembling an application into code executable by the processor.
Claim 6
Dependent Claim
26 words
The system of claim 1 , wherein the software development tools include a linker, tailored to the configuration specification, for linking code executable by the processor.
Claim 7
Dependent Claim
26 words
The system of claim 1 , wherein the software development tools include a disassembler, tailored to the configuration specification, for disassembling code executable by the processor.
Claim 8
Dependent Claim
26 words
The system of claim 1 , wherein the software development tools include a debugger, tailored to the configuration specification, for debugging code executable by the processor.
Claim 9
Dependent Claim
22 words
The system of claim 7 , wherein the debugger has a common interface and configuration for instruction set simulator and hardware implementations.
Claim 10
Dependent Claim
28 words
The system of claim 1 , wherein the software development tools include an instruction set simulator, tailored to the configuration specification, for simulating code executable by the processor.
Claim 11
Dependent Claim
28 words
The system of claim 9 , wherein the instruction set simulator is to model execution of code being simulated to measure key performance criteria including cycles of execution.
Claim 12
Dependent Claim
17 words
The system of claim 10 , wherein the performance criteria are based on specific configurable microarchitectural features.
Claim 13
Dependent Claim
35 words
The system of claim 10 , wherein the instruction set simulator is to profile execution of the program being simulated to record standard profiling statistics, including a number of cycles executed in each simulated function.
Claim 14
Dependent Claim
18 words
The system of claim 1 , wherein the hardware implementation description includes a detailed HDL hardware implementation description.
Claim 15
Dependent Claim
14 words
The system of claim 1 , wherein the hardware implementation description includes synthesis scripts.
Claim 16
Dependent Claim
16 words
The system of claim 1 , wherein the hardware implementation description includes place and route scripts.
Claim 17
Dependent Claim
16 words
The system of claim 1 , wherein the hardware implementation description includes programmable logic device scripts.
Claim 18
Dependent Claim
15 words
The system of claim 1 , wherein the hardware implementation description includes a test bench.
Claim 19
Dependent Claim
16 words
The system of claim 1 , wherein the hardware implementation description includes diagnostic tests for verification.
Claim 20
Dependent Claim
20 words
The system of claim 1 , wherein the hardware implementation description includes scripts for running diagnostic tests on a simulator.
Claim 21
Dependent Claim
14 words
The system of claim 1 , wherein the hardware implementation description includes test tools.
Claim 22
Dependent Claim
67 words
The system of claim 1 , wherein the means for generating the hardware implementation description comprises: means for generating a hardware description language description of the hardware implementation description from the configuration specification; means for synthesizing logic for the hardware implementation based on the hardware description language description; and means for placing and routing components on a chip based on the synthesized logic to form a circuit.
Claim 23
Dependent Claim
37 words
The system of claim 21 , the means for generating the hardware implementation description further comprising: means for verifying timing of the circuit; and means for determining the area, cycle time and power dissipation of the circuit.
Claim 24
Dependent Claim
14 words
The system of claim 1 , further comprising means for generating the configuration specification.
Claim 25
Dependent Claim
24 words
The system of claim 23 , wherein the means for generating the configuration specification is responsive to selection of configuration parameters by a user.
Claim 26
Dependent Claim
26 words
The system of claim 23 , wherein the means for generating the configuration specification is for generating the specification based on design goals for the processor.
Claim 27
Dependent Claim
23 words
The system of claim 1 , wherein the configuration specification includes at least one parameter specification of a modifiable characteristic of the processor.
Claim 28
Dependent Claim
30 words
The system of claim 26 , wherein the at least one parameter specification specifies the inclusion of a functional unit, and at least one processor instruction operating the functional unit.
Claim 29
Dependent Claim
26 words
The system of claim 27 , wherein the functional unit is a multiplier and the parameter specification specifies at least one multiply instruction operating the multiplier.
Claim 30
Dependent Claim
34 words
The system of claim 27 , wherein the functional unit is a multiply-accumulate unit and the parameter specification specifies at least one instruction performing a compound multiply, accumulate, operand load and address update operation.
Claim 31
Dependent Claim
29 words
The system of claim 27 , wherein the functional unit is a digital signal processor and the parameter specification specifies at least one instruction operating the digital signal processor.
Claim 32
Dependent Claim
25 words
The system of claim 27 , wherein the functional unit is a coprocessor and the parameter specification specifies at least one instruction operating the coprocessor.
Claim 33
Dependent Claim
27 words
The system of claim 26 , wherein the at least one parameter specification specifies one of the inclusion, exclusion and features of a structure affecting processor state.
Claim 34
Dependent Claim
26 words
The system of claim 32 , wherein the structure is a register file and the parameter specification specifies the number of registers in the register file.
Claim 35
Dependent Claim
13 words
The system of claim 32 , wherein the structure is an instruction cache.
Claim 36
Dependent Claim
16 words
The system of claim 34 , wherein the parameter specification specifies the size of the cache.
Claim 37
Dependent Claim
17 words
The system of claim 35 , wherein the parameter specification specifies the line size of the cache.
Claim 38
Dependent Claim
16 words
The system of claim 35 , wherein the parameter specification specifies set associativity of the cache.
Claim 39
Dependent Claim
13 words
The system of claim 32 , wherein the structure is a data cache.
Claim 40
Dependent Claim
16 words
The system of claim 38 , wherein the parameter specification specifies the size of the cache.
Claim 41
Dependent Claim
17 words
The system of claim 38 , wherein the parameter specification specifies the line size of the cache.
Claim 42
Dependent Claim
17 words
The system of claim 38 , wherein the parameter specification specifies the set associativity of the cache.
Claim 43
Dependent Claim
13 words
The system of claim 32 , wherein the structure is a write buffer.
Claim 44
Dependent Claim
19 words
The system of claim 32 , wherein the structure is one of an on-chip ROM and an on-chip RAM.
Claim 45
Dependent Claim
31 words
The system of claim 26 , wherein the at least one parameter specification specifies a semantic characteristic controlling the interpretation of at least one of data and instructions in the processor.
Claim 46
Dependent Claim
28 words
The system of claim 44 , wherein the semantic characteristic is instruction byte ordering and the parameter specification specifies one of big endian and little endian byte ordering.
Claim 47
Dependent Claim
18 words
The system of claim 44 , wherein the semantic characteristic is a code density of the instruction set.
Claim 48
Dependent Claim
25 words
The system of claim 26 , wherein the at least one parameter specification specifies an execution characteristic controlling the execution of instructions in the processor.
Claim 49
Dependent Claim
19 words
The system of claim 47 , wherein the execution characteristic is the number of external interrupts of the processor.
Claim 50
Dependent Claim
20 words
The system of claim 47 , wherein the execution characteristic is the number of interrupt priority levels of the processor.
Claim 51
Dependent Claim
19 words
The system of claim 47 , wherein the execution characteristic is the number of interrupt timers of the processor.
Claim 52
Dependent Claim
24 words
The system of claim 47 , wherein the execution characteristic is that a cache is one of a write-back cache and a write-through cache.
Claim 53
Dependent Claim
18 words
The system of claim 47 , wherein the execution characteristic is synchronization of the processor with another processor.
Claim 54
Dependent Claim
14 words
The system of claim 47 , wherein the execution characteristic is software-controlled branch speculation.
Claim 55
Dependent Claim
17 words
The system of claim 47 , wherein the execution characteristic is a windowing operation of processor registers.
Claim 56
Dependent Claim
19 words
The system of claim 26 , wherein the at least one parameter specification specifies debugging characteristics of the processor.
Claim 57
Dependent Claim
24 words
The system of claim 55 , wherein the debugging characteristics include one of the inclusion and exclusion of an address trace and pipeline port.
Claim 58
Dependent Claim
24 words
The system of claim 55 , wherein the debugging characteristics include one of the inclusion and exclusion of instruction and data break point support.
Claim 59
Dependent Claim
13 words
The system of claim 55 , wherein the debugging characteristics include verification support.
Claim 60
Dependent Claim
39 words
The system of claim 26 , wherein the configuration specification includes a parameter specification specifying at least one of a selection of a predetermined feature; a size or number of a processor element; and an assignment of a value.
Claim 61
Dependent Claim
16 words
The system of claim 1 , further comprising means for evaluating suitability of the configuration specification.
Claim 62
Dependent Claim
16 words
The system of claim 60 , wherein the means for evaluating includes an interactive estimation tool.
Claim 63
Dependent Claim
24 words
The system of claim 60 , wherein the means for evaluating is for evaluating hardware characteristics of a processor described by the configuration specification.
Claim 64
Dependent Claim
28 words
The system of claim 60 , wherein the means for evaluating is for evaluating the suitability of the configuration specification based on estimated performance characteristics of the processor.
Claim 65
Dependent Claim
24 words
The system of claim 63 , further comprising means for providing information enabling modification of the configuration specification based on the estimated performance characteristics.
Claim 66
Dependent Claim
35 words
The system of claim 63 , wherein the performance characteristics include at least one of area required to implement the processor on a chip, power consumed by the processor and clock speed of the processor.
Claim 67
Dependent Claim
27 words
The system of claim 60 , wherein the means for evaluating is for evaluating suitability of the configuration specification based on estimated software characteristics of the processor.
Claim 68
Dependent Claim
47 words
The system of claim 66 , wherein the means for evaluating is for presenting a suitability evaluation to a user interactively by estimating at least one of code size and cycles required to execute a suite of benchmark programs on a processor described by the configuration specification.
Claim 69
Dependent Claim
27 words
The system of claim 60 , wherein the means for evaluating is for evaluating hardware characteristics and software characteristics of a processor described by the configuration specification.
Claim 70
Dependent Claim
68 words
The system of claim 1 wherein the means for generating a description of a hardware implementation of the processor is further for providing a characterization of hardware performance and cost, and the means for generating the software development tools are for generating software application performance information together with the means for generating a description of a hardware implementation of the processor, to facilitate modification of the configuration specification.
Claim 71
Dependent Claim
69 words
The system of claim 1 wherein the means for generating a description of a hardware implementation of the processor is further for providing a characterization of hardware performance and cost, and the means for generating the software development tools are for generating software application performance information together with the means for generating a description of a hardware implementation of the processor, to facilitate an extension of the configuration specification.
Claim 72
Dependent Claim
128 words
The system of claim 1 wherein: the means for generating a hardware description of the processor is further for providing a characterization of hardware performance and cost, and the means for generating the software development tools are for generating software application performance information together with the means for generating a description of a hardware implementation of the processor, to facilitate modification of the configuration specification; and the means for generating a hardware description of the processor is for providing a characterization of hardware performance and cost, and the means for generating the software development tools are for generating software application performance information together with the means for generating a description of a hardware implementation of the processor, to facilitate the description of an extension of the configuration specification.
Claim 73
Dependent Claim
18 words
The system of claim 1 , further comprising means for generating a configuration of the processor by extension.
Claim 74
Dependent Claim
23 words
The system of claim 1 , wherein the configuration specification includes at least one extension specification of an extensible characteristic of the processor.
Claim 75
Dependent Claim
14 words
The system of claim 73 , wherein the extension specification specifies an additional instruction.
Claim 76
Dependent Claim
22 words
The system of claim 73 , wherein the extension specification specifies inclusion of a user-defined instruction and an implementation for the instruction.
Claim 77
Dependent Claim
32 words
The system of claim 75 , wherein the means for generating the software development tools includes means for suggesting to the user potential user-defined instructions particularly suited to at least one application.
Claim 78
Dependent Claim
19 words
The system of claim 75 , wherein the software development tools include a compiler to generate the user-defined instruction.
Claim 79
Dependent Claim
16 words
The system of claim 77 , wherein the compiler is to optimize code containing user-defined instructions.
Claim 80
Dependent Claim
19 words
The system of claim 75 , wherein the software development tools include an assembler to generate the user-defined instruction.
Claim 81
Dependent Claim
24 words
The system of claim 75 , wherein the software development tools include a simulator to simulate execution of user code using the user-defined instruction.
Claim 82
Dependent Claim
22 words
The system of claim 75 , wherein the software development tools include tools to verify the user implementation of the user-defined instruction.
Claim 83
Dependent Claim
15 words
The system of claim 74 , wherein the compiler is to automatically generate additional instructions.
Claim 84
Dependent Claim
48 words
The system of claim 73 , wherein: the extension specification specifies a new feature having functionality substantially designed by a user in abstract form; and the means for generating the hardware implementation description is further for redefining and integrating the new feature into the detailed hardware implementation description.
Claim 85
Dependent Claim
27 words
The system of claim 83 , wherein the extension specification is a statement in an instruction set architecture language specifying an opcode assignment and an instruction semantic.
Claim 86
Dependent Claim
29 words
The system of claim 84 , wherein the means for generating the hardware implementation description includes means for generating instruction decode logic from the instruction set architecture language definition.
Claim 87
Dependent Claim
39 words
The system of claim 85 , wherein the means for generating the hardware implementation description further includes means for generating signals specifying register operand usage for instruction interlock and stall logic based on the instruction set architecture language definition.
Claim 88
Dependent Claim
33 words
The system of claim 83 , wherein the means for generating software development tools includes means for generating an instruction decode process used in an instruction set simulator tailored to the configuration specification.
Claim 89
Dependent Claim
29 words
The system of claim 83 , wherein the means for generating software development tools includes means for generating encode tables used in an assembler tailored to the configuration specification.
Claim 90
Dependent Claim
41 words
The system of claim 83 , wherein the means for generating the hardware implementation description is further for generating a description of datapath hardware for the new feature, the datapath hardware being consistent with a particular pipelined architecture of the processor.
Claim 91
Dependent Claim
17 words
The system of claim 74 , wherein the additional structure adds no new state to the processor.
Claim 92
Dependent Claim
15 words
The system of claim 74 , wherein the additional instruction adds state to the processor.
Claim 93
Dependent Claim
24 words
The system of claim 1 , wherein the configuration specification includes at least a portion specified by an instruction set architecture description language description.
Claim 94
Dependent Claim
30 words
The system of claim 92 , wherein the means for generating the hardware implementation description comprises means for generating instruction decode logic automatically from the instruction set architecture language description.
Claim 95
Dependent Claim
29 words
The system of claim 92 , wherein the means for generating software development tools comprises means for generating an assembler core automatically from the instruction set architecture language description.
Claim 96
Dependent Claim
28 words
The system of claim 92 , wherein the means for generating software development tools comprises means for generating a compiler automatically from the instruction set architecture language description.
Claim 97
Dependent Claim
28 words
The system of claim 92 , wherein the means for generating software development tools comprises means for generating a disassembler automatically from the instruction set architecture language description.
Claim 98
Dependent Claim
30 words
The system of claim 92 , wherein the means for generating software development tools comprises means for generating an instruction set simulator automatically from the instruction set architecture language description.
Claim 99
Dependent Claim
51 words
The system of claim 1 , wherein the means for generating the hardware implementation description includes means for preprocessing a portion of at least one of the hardware implementation description and the software development tools to modify the hardware implementation description and the software tools, respectively, based on the configuration specification.
Claim 100
Dependent Claim
40 words
The system of claim 98 , wherein the means for preprocessing is for evaluating an expression in one of the hardware implementation description and the software development tools and replacing the expression with a value based on the configuration specification.
Claim 101
Dependent Claim
24 words
The system of claim 99 , where the expression includes at least one of an iterative construct, a conditional construct and a database query.
Claim 102
Dependent Claim
36 words
The system of claim 1 , wherein the configuration specification includes at least one parameter specification specifying a modifiable characteristic of the processor and at least one extension specification specifying an extensible characteristic of the processor.
Claim 103
Dependent Claim
29 words
The system of claim 101 , wherein the modifiable characteristic is one of a modification to the core specification and an optional feature not specified in the core specification.
Claim 104
Dependent Claim
46 words
The system of claim 1 , wherein the configuration specification includes at least one parameter specification specifying a binary selectable characteristic of the processor, at least one parametrically specifiable characteristic of the processor, and at least one extension specification specifying an extensible characteristic of the processor.
Claim 105
Independent Claim
40 words
A method of designing a configurable processor, the method comprising: generating a description of a hardware implementation of the processor based on a configuration specification; and generating software development tools specific to the hardware implementation based on the configuration specification.
Claim 106
Independent Claim
40 words
A method of designing a configurable processor, the method comprising: generating a description of a hardware implementation of the processor based on a configuration specification; and generating software development tools specific to the hardware implementation based on the configuration specification.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-11-04 | 2006-05-06 | 2006-11-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-11-04 | 2010-05-06 | 2010-11-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-11-04 | 2014-05-06 | 2014-11-05 | $7700.00 | Window Closed / Lapsed |