US6466770B1 — BALUN circuit for combining differential power am…

Claim 1

Independent Claim 123 words

A BALUN circuit comprising: a lead network for advancing the phase of a positive phase output of a differential power amplifier by a first amount; a lag network for retarding the phase of a negative phase output of a differential power amplifier by a second amount; a delay element coupled in series with the lag network for further retarding the phase of the negative phase output of the power amplifier by a third amount, the first, second, and third amounts being such that, at a point of combination, the adjusted phases of the positive and negative phase outputs are about equal; and a single-ended output formed by combining at the point of combination the outputs of the lead network and the delay element.

Claim 2

Dependent Claim 123 words

A BALUN circuit comprising: a lead network for advancing the phase of a positive phase output of a differential power amplifier by a first amount; a lag network for retarding the phase of a negative phase output of a differential power amplifier by a second amount; a delay element coupled in series with the lag network for further retarding the phase of the negative phase output of the power amplifier by a third amount, the first, second, and third amounts being such that, at a point of combination, the adjusted phases of the positive and negative phase outputs are about equal; and a single-ended output formed by combining at the point of combination the outputs of the lead network and the delay element.

Claim 3

Dependent Claim 15 words

The circuit of claim 1 in which the lead network comprises a high pass network.

Claim 4

Dependent Claim 22 words

The circuit of claim 2 in which the high pass network is a high pass filter which comprises an inductor and capacitor.

Claim 5

Dependent Claim 15 words

The circuit of claim 3 in which the lag network is a low pass network.

Claim 6

Dependent Claim 22 words

The circuit of claim 4 in which the low pass network is a low pass filter which comprises an inductor and capacitor.

Claim 7

Dependent Claim 14 words

The circuit of claim 5 in which the delay element is a printed elements.

Claim 8

Dependent Claim 19 words

The circuit of claim 6 in which the inductors of the high and low pass filters are printed elements.

Claim 9

Dependent Claim 18 words

The circuit of claim 7 in which the shunt capacitor of the lag network is a printed element.

Claim 10

Dependent Claim 13 words

The circuit of claim 7 in which the printed elements are printed microstrips.

Claim 11

Dependent Claim 19 words

The circuit of claim 1 in which the output impedance of the single-ended output is a desired output impedance.

Claim 12

Dependent Claim 21 words

The circuit of claim 11 in which the output impedance is a desired resistive output impedance of about Z 0 .

Claim 13

Dependent Claim 20 words

The circuit of claim 11 in which the output impedance of the lead network is about twice Z 0 .

Claim 14

Dependent Claim 20 words

The circuit of claim 12 in which the output impedance of the lag network is about twice Z 0 .

Claim 15

Dependent Claim 19 words

The circuit of claim 13 in which the impedance of the delay element is about twice Z 0 .

Claim 16

Dependent Claim 30 words

The circuit of claim 14 in which the single-ended output is formed from the parallel combination of the output of the lead network and the output of the delay element.

Claim 17

Dependent Claim 154 words

An RF transmitter comprising: a transceiver that receives baseband data and encodes it onto an RF differential pair of signals; a power amplifier (PA) for amplifying the differential RF signals from the transceiver onto a differential pair of output signals comprising a positive phase signal and a negative phase signal; a BALUN circuit comprising: a lead network that advances the phase of the positive phase signal by a first amount; a lag network that retards the phase of the negative phase signal by a second amount; a delay element for further retarding the phase of the negative phase signal by a third amount, the first, second, and third amounts being such that the adjusted phase of the positive and negative phase outputs at a point of combination is about equal; a single-ended output formed by combining at the point of combination the output of the lead network and the output of the delay element.

Claim 18

Dependent Claim 154 words

An RF transmitter comprising: a transceiver that receives baseband data and encodes it onto an RF differential pair of signals; a power amplifier (PA) for amplifying the differential RF signals from the transceiver onto a differential pair of output signals comprising a positive phase signal and a negative phase signal; a BALUN circuit comprising: a lead network that advances the phase of the positive phase signal by a first amount; a lag network that retards the phase of the negative phase signal by a second amount; a delay element for further retarding the phase of the negative phase signal by a third amount, the first, second, and third amounts being such that the adjusted phase of the positive and negative phase outputs at a point of combination is about equal; a single-ended output formed by combining at the point of combination the output of the lead network and the output of the delay element.

Claim 19

Dependent Claim 35 words

The transmitter of claim 16 further comprising: a filter for filtering the single-ended output; a switch for switching between transmit and receive modes of operation; and an antenna for receiving and transmitting the filtered signal.

Claim 20

Dependent Claim 21 words

The RF transmitter of claim 16 in which the output impedance of the single-ended output is about a desired output impedance.

Claim 21

Dependent Claim 20 words

The RF transmitter of claim 18 in which the desired output impedance is a resistive output impedance Z 0 .

Claim 22

Dependent Claim 21 words

The RF transmitter of claim 19 in which the output impedance of the lead network is about twice Z 0 .

Claim 23

Dependent Claim 21 words

The RF transmitter of claim 20 in which the output impedance of the lag network is about twice Z 0 .

Claim 24

Dependent Claim 20 words

The RF transmitter of claim 21 in which the impedance of the delay element is about twice Z 0 .

Claim 25

Dependent Claim 30 words

The RF transmitter of claim 22 in which the single-ended output is formed by combining in parallel the output of the lead network and the output of the delay element.

Claim 26

Dependent Claim 10 words

The RF transmitter of claim 16 in a cordless handset.

Claim 27

Dependent Claim 12 words

The RF Transmitter of claim 16 in a mobile wireless communications device.

Claim 28

Independent Claim 151 words

A method of implementing a BALUN circuit comprising: coupling a lead network to a positive phase output of a differential power amplifier, the lead network configured to advance the phase of the positive phase output by a first amount; coupling a lag network to a negative phase output of the differential power amplifier, the lag network configured to retard the phase of the negative phase output by a second amount; coupling a delay element in series with the lag network, the delay element configured to further retard the phase of the phase of the negative phase output by a third amount, the first, second, and third amounts such that the phases of the adjusted positive and negative phase outputs of the power amplifier, at a point of combination, are about the same; and combining the adjusted positive and negative phase outputs at the point of combination to form a single-ended output.

Claim 29

Independent Claim 151 words

A method of implementing a BALUN circuit comprising: coupling a lead network to a positive phase output of a differential power amplifier, the lead network configured to advance the phase of the positive phase output by a first amount; coupling a lag network to a negative phase output of the differential power amplifier, the lag network configured to retard the phase of the negative phase output by a second amount; coupling a delay element in series with the lag network, the delay element configured to further retard the phase of the phase of the negative phase output by a third amount, the first, second, and third amounts such that the phases of the adjusted positive and negative phase outputs of the power amplifier, at a point of combination, are about the same; and combining the adjusted positive and negative phase outputs at the point of combination to form a single-ended output.

Claim 30

Dependent Claim 50 words

The method of claim 26 further comprising coupling a lead network to the positive phase output of the power amplifier, wherein the lead network is configured to adjust the output impedance of the positive phase output to about twice a desired resistive output impedance Z 0 of the single-ended output.

Claim 31

Dependent Claim 42 words

The method of claim 27 further comprising coupling a lag network to the negative phase output of the power amplifier, wherein the lag network is configured to adjust the output impedance of the negative phase output to about twice Z 0 .

Claim 32

Dependent Claim 26 words

The method of claim 28 further comprising coupling in series with the lead network a delay element having an impedance of about twice Z 0 .

Claim 33

Dependent Claim 38 words

The method of claim 29 further comprising combining in parallel the outputs of the lead network and the delay element to form the single-ended output, whereby the output impedance of the single-ended output is about Z 0 .

Claim 34

Independent Claim 159 words

A method of combining the differential outputs of a power amplifier comprising: advancing the phase of the positive phase output of the power amplifier by a first amount; retarding the phase of the negative phase output of the power amplifier by a second amount; further retarding the phase of the negative phase output of the power amplifier by a third amount; adjusting the impedance of the positive phase output of the power amplifier to a first impedance; adjusting the impedance of the negative phase output of the power amplifier to a second impedance; and combining the adjusted positive and negative phase outputs of the power amplifier at a node to form a single-ended output, the first, second, and third amounts being such that the adjusted phases of the positive and negative phase outputs are about the same, the first and second desired impedances being such that the output impedance of the single-ended output is about a desired output impedance.

Claim 35

Independent Claim 159 words

A method of combining the differential outputs of a power amplifier comprising: advancing the phase of the positive phase output of the power amplifier by a first amount; retarding the phase of the negative phase output of the power amplifier by a second amount; further retarding the phase of the negative phase output of the power amplifier by a third amount; adjusting the impedance of the positive phase output of the power amplifier to a first impedance; adjusting the impedance of the negative phase output of the power amplifier to a second impedance; and combining the adjusted positive and negative phase outputs of the power amplifier at a node to form a single-ended output, the first, second, and third amounts being such that the adjusted phases of the positive and negative phase outputs are about the same, the first and second desired impedances being such that the output impedance of the single-ended output is about a desired output impedance.

Claim 36

Dependent Claim 14 words

The method of claim 31 wherein the first and second impedances are the same.

Claim 37

Dependent Claim 21 words

The method of claim 32 wherein the desired output impedance of the single-ended output is a resistive impedance Z 0 .

Claim 38

Dependent Claim 17 words

The method of claim 33 wherein the first and second impedances are about twice Z 0 .

Claim 39

Dependent Claim 52 words

The method of claim 31 further comprising retarding the phase of the positive phase output of the power amplifier by a fourth amount, the first, second, third, and fourth amounts being such that the phases of the adjusted positive and negative phase outputs, at the point of combination, are about the same.

Claim 40

Dependent Claim 125 words

A BALUN circuit comprising: a lead network for advancing the phase of a first component of a differential signal by a first amount; a lag network for retarding the phase of a second component of the differential signal by a second amount; a delay element coupled in series with the lag network for retarding the phase of the second component of the differential signal by a third amount; and a combining node for combining signals derived from the outputs of the lead network and one or the other of the delay element and the lag network to form a single-ended signal, the first, second, and third amounts being such that, at the combining node, the phases of the signals being combined are about the same.

Claim 41

Dependent Claim 125 words

A BALUN circuit comprising: a lead network for advancing the phase of a first component of a differential signal by a first amount; a lag network for retarding the phase of a second component of the differential signal by a second amount; a delay element coupled in series with the lag network for retarding the phase of the second component of the differential signal by a third amount; and a combining node for combining signals derived from the outputs of the lead network and one or the other of the delay element and the lag network to form a single-ended signal, the first, second, and third amounts being such that, at the combining node, the phases of the signals being combined are about the same.

Claim 42

Dependent Claim 17 words

The circuit of claim 36 wherein the first component of the differential signal is the positive component.

Claim 43

Dependent Claim 17 words

The circuit of claim 36 wherein the second component of the differential signal is the negative component.

Claim 44

Dependent Claim 121 words

A BALUN circuit comprising: lead means for advancing the phase of a first component of a differential signal by a first amount; lag means for retarding the phase of a second component of the differential signal by a second amount; delay means coupled in series with the lag means for retarding the phase of the second component of the differential signal by a third amount; and combining means for combining signals derived from the outputs of the lead means and one or the other of the delay means and the lag means to form a single-ended signal, the first, second, and third amounts being such that, at the combining means, the phases of the signals being combined are about the same.

Claim 45

Dependent Claim 121 words

A BALUN circuit comprising: lead means for advancing the phase of a first component of a differential signal by a first amount; lag means for retarding the phase of a second component of the differential signal by a second amount; delay means coupled in series with the lag means for retarding the phase of the second component of the differential signal by a third amount; and combining means for combining signals derived from the outputs of the lead means and one or the other of the delay means and the lag means to form a single-ended signal, the first, second, and third amounts being such that, at the combining means, the phases of the signals being combined are about the same.

Claim 46

Independent Claim 103 words

A method of combining first and second components of a differential signal to form a single-ended signal comprising: advancing the phase of the first component of a differential signal by a first amount; retarding the phase of the second component of the differential signal by a second amount; retarding the phase of the second component of the differential signal by a third amount; and combining signals derived from the adjusted first and second components of the differential signal to form a single-ended signal, the first, second, and third amounts being such that the phases of the signals being combined are about the same.

Claim 47

Independent Claim 103 words

A method of combining first and second components of a differential signal to form a single-ended signal comprising: advancing the phase of the first component of a differential signal by a first amount; retarding the phase of the second component of the differential signal by a second amount; retarding the phase of the second component of the differential signal by a third amount; and combining signals derived from the adjusted first and second components of the differential signal to form a single-ended signal, the first, second, and third amounts being such that the phases of the signals being combined are about the same.

Claim 48

Independent Claim 115 words

A method of combining first and second components of a differential signal to form a single-ended signal comprising: a step for advancing the phase of the first component of a differential signal by a first amount; a step for retarding the phase of the second component of the differential signal by a second amount; a step for retarding the phase of the second component of the differential signal by a third amount; and a step for combining signals derived from the adjusted first and second components of the differential signal to form a single-ended signal, the first, second, and third amounts being such that the phases of the signals being combined are about the same.

Claim 49

Independent Claim 115 words

A method of combining first and second components of a differential signal to form a single-ended signal comprising: a step for advancing the phase of the first component of a differential signal by a first amount; a step for retarding the phase of the second component of the differential signal by a second amount; a step for retarding the phase of the second component of the differential signal by a third amount; and a step for combining signals derived from the adjusted first and second components of the differential signal to form a single-ended signal, the first, second, and third amounts being such that the phases of the signals being combined are about the same.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2005-10-14	2006-04-15	2006-10-15	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2009-10-14	2010-04-15	2010-10-15	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2013-10-14	2014-04-15	2014-10-15	$7700.00	Window Closed / Lapsed

BALUN circuit for combining differential power amplifier outputs

Abstract

Inventors

Bibliographic Details

Claims Analysis

References Cited (Backward Citations)

USPTO Annuity & Maintenance Windows

Assigned Categories & Tags

Assign Category Tag